Re: [PATCH 06/10] spi: rzv2m-csi: Squash timing settings into one statement

[Andy Shevchenko <andy.shevchenko@gmail.com>]

On Mon, Jul 17, 2023 at 1:44 PM Fabrizio Castro
<fabrizio.castro.jz@renesas.com> wrote:
> > From: Andy Shevchenko <andy.shevchenko@gmail.com>
> > On Sat, Jul 15, 2023 at 4:04 AM Fabrizio Castro
> > <fabrizio.castro.jz@renesas.com> wrote:

...

> > >         /* Setup clock polarity and phase timing */
> > > -       rzv2m_csi_reg_write_bit(csi, CSI_CLKSEL, CSI_CLKSEL_CKP,
> > > -                               !(spi->mode & SPI_CPOL));
> > > -       rzv2m_csi_reg_write_bit(csi, CSI_CLKSEL, CSI_CLKSEL_DAP,
> > > -                               !(spi->mode & SPI_CPHA));
> > > +       rzv2m_csi_reg_write_bit(csi, CSI_CLKSEL, CSI_CLKSEL_MODE,
> > > +                               ~spi->mode & SPI_MODE_X_MASK);
> >
> > I think this now regresses due to the absence of parentheses.
>
> This looks okay to me. CSI_CLKSEL_CKP needs to contain the inverted value
> of SPI_CPOL, and CSI_CLKSEL_DAP needs to contain the inverted value of
> SPI_CPHA, and that happens with both use cases.

Ah, this is interchangeable since we will get the same bits in the end, indeed.

-- 
With Best Regards,
Andy Shevchenko