From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
Cc: Ralf Baechle <ralf-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org>,
Linux-MIPS <linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org>,
"linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org"
<linux-mtd-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>,
LINUX-WATCHDOG
<linux-watchdog-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
"devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
Martin Blumenstingl
<martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>,
John Crispin <john-Pj+rj9U5foFAfugRpC6u6w@public.gmane.org>,
"linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org"
<linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org>,
hauke.mehrtens-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org,
Andy Shevchenko
<andy.shevchenko-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>,
Philipp Zabel <p.zabel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
Subject: Re: [PATCH v3 07/16] Documentation: DT: MIPS: lantiq: Add docs for the RCU bindings
Date: Wed, 31 May 2017 16:04:17 -0500 [thread overview]
Message-ID: <CAL_JsqL=iapYifAhDcYSLRGyevx7RxGiUtji72NJD-uYCQnCdw@mail.gmail.com> (raw)
In-Reply-To: <6b8bb1cd-c090-435d-d150-d53edf04d2df-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
On Wed, May 31, 2017 at 3:13 PM, Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org> wrote:
> On 05/31/2017 10:05 PM, Rob Herring wrote:
>> On Sun, May 28, 2017 at 08:39:57PM +0200, Hauke Mehrtens wrote:
>>> From: Martin Blumenstingl <martin.blumenstingl-gM/Ye1E23mwN+BqQ9rBEUg@public.gmane.org>
>>>
>>> This adds the initial documentation for the RCU module (a MFD device
>>> which provides USB PHYs, reset controllers and more).
>>>
>>> The RCU register range is used for multiple purposes. Mostly one device
>>> uses one or multiple register exclusively, but for some registers some
>>> bits are for one driver and some other bits are for a different driver.
>>> With this patch all accesses to the RCU registers will go through
>>> syscon.
>>>
>>> Signed-off-by: Hauke Mehrtens <hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
>>> ---
>>> .../devicetree/bindings/mips/lantiq/rcu.txt | 97 ++++++++++++++++++++++
>>> 1 file changed, 97 insertions(+)
>>> create mode 100644 Documentation/devicetree/bindings/mips/lantiq/rcu.txt
>>>
>>> diff --git a/Documentation/devicetree/bindings/mips/lantiq/rcu.txt b/Documentation/devicetree/bindings/mips/lantiq/rcu.txt
>>> new file mode 100644
>>> index 000000000000..3e2461262218
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/mips/lantiq/rcu.txt
>>> @@ -0,0 +1,97 @@
>>> +Lantiq XWAY SoC RCU binding
>>> +===========================
>>> +
>>> +This binding describes the RCU (reset controller unit) multifunction device,
>>> +where each sub-device has it's own set of registers.
>>> +
>>> +The RCU register range is used for multiple purposes. Mostly one device
>>> +uses one or multiple register exclusively, but for some registers some
>>> +bits are for one driver and some other bits are for a different driver.
>>> +With this patch all accesses to the RCU registers will go through
>>> +syscon.
>>> +
>>> +
>>> +-------------------------------------------------------------------------------
>>> +Required properties:
>>> +- compatible : The first and second values must be: "simple-mfd", "syscon"
>>> +- reg : The address and length of the system control registers
>>> +
>>> +
>>> +-------------------------------------------------------------------------------
>>> +Example of the RCU bindings on a xRX200 SoC:
>>> + rcu0: rcu@203000 {
>>> + compatible = "lantiq,rcu-xrx200", "simple-mfd", "syscon";
>>> + reg = <0x203000 0x100>;
>>> + big-endian;
>>> +
>>> + gphy0: gphy@0 {
>>
>> Unit address without reg address is not valid.
>>
>>> + compatible = "lantiq,xrx200a2x-rcu-gphy";
>>> +
>>> + regmap = <&rcu0>;
>>> + offset = <0x20>;
>>
>> Does reg not work instead?
>
> Is it ok to access some registers in this range with a reg = <0x20 0x04>
> setting and some others through syscon? This specific register is only
> used by this gphy, but the reset controller shares the register with
> some other drivers like the watchdog driver.
Yes. The main thing is you need to use reg where you have unit addresses.
For the syscon-reboot, you could also just not describe in DT and have
the reset ctrlr driver register reboot driver. DT is not the only way
to instantiate drivers.
Rob
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next prev parent reply other threads:[~2017-05-31 21:04 UTC|newest]
Thread overview: 29+ messages / expand[flat|nested] mbox.gz Atom feed top
2017-05-28 18:39 [PATCH v3 00/16] MIPS: lantiq: handle RCU register by separate drivers Hauke Mehrtens
[not found] ` <20170528184006.31668-1-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-05-28 18:39 ` [PATCH v3 01/16] MIPS: lantiq: Use of_platform_default_populate instead of __dt_register_buses Hauke Mehrtens
2017-05-28 18:39 ` [PATCH v3 02/16] mtd: lantiq-flash: drop check of boot select Hauke Mehrtens
2017-05-28 18:39 ` [PATCH v3 03/16] mtd: spi-falcon: " Hauke Mehrtens
2017-05-28 18:39 ` [PATCH v3 04/16] watchdog: lantiq: access boot cause register through regmap Hauke Mehrtens
2017-05-28 18:39 ` [PATCH v3 05/16] watchdog: lantiq: add device tree binding documentation Hauke Mehrtens
[not found] ` <20170528184006.31668-6-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-05-31 20:00 ` Rob Herring
2017-05-31 20:11 ` Hauke Mehrtens
2017-05-28 18:39 ` [PATCH v3 06/16] MIPS: lantiq: Enable MFD_SYSCON to be able to use it for the RCU MFD Hauke Mehrtens
2017-05-28 18:39 ` [PATCH v3 07/16] Documentation: DT: MIPS: lantiq: Add docs for the RCU bindings Hauke Mehrtens
[not found] ` <20170528184006.31668-8-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-05-31 20:05 ` Rob Herring
2017-05-31 20:13 ` Hauke Mehrtens
[not found] ` <6b8bb1cd-c090-435d-d150-d53edf04d2df-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-05-31 21:04 ` Rob Herring [this message]
2017-05-28 18:39 ` [PATCH v3 08/16] MIPS: lantiq: Convert the fpi bus driver to a platform_driver Hauke Mehrtens
[not found] ` <20170528184006.31668-9-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-05-30 18:23 ` Andy Shevchenko
[not found] ` <CAHp75VcU3cF07GQG5vPV9uhmpOzO2aGD8Fj9-Do4yN3BXNN1Rg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-05-30 22:02 ` Hauke Mehrtens
2017-05-31 20:54 ` Rob Herring
2017-05-28 18:39 ` [PATCH v3 09/16] MIPS: lantiq: remove ltq_reset_cause() and ltq_boot_select() Hauke Mehrtens
2017-05-28 18:40 ` [PATCH v3 10/16] reset: Add a reset controller driver for the Lantiq XWAY based SoCs Hauke Mehrtens
2017-05-29 10:20 ` Philipp Zabel
[not found] ` <1496053214.17695.49.camel-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>
2017-05-31 20:58 ` Rob Herring
2017-05-28 18:40 ` [PATCH v3 11/16] MIPS: lantiq: remove old reset controller implementation Hauke Mehrtens
2017-05-28 18:40 ` [PATCH v3 12/16] MIPS: lantiq: Add a GPHY driver which uses the RCU syscon-mfd Hauke Mehrtens
2017-05-28 18:40 ` [PATCH v3 13/16] MIPS: lantiq: remove old GPHY loader code Hauke Mehrtens
2017-05-28 18:40 ` [PATCH v3 14/16] phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module Hauke Mehrtens
[not found] ` <20170528184006.31668-15-hauke-5/S+JYg5SzeELgA04lAiVw@public.gmane.org>
2017-05-30 18:31 ` Andy Shevchenko
[not found] ` <CAHp75Ve9bV99=WCzmXU-Rth-gar5gqvy4taZ7NMQQHGKcVbHHw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2017-05-30 20:21 ` Hauke Mehrtens
2017-05-28 18:40 ` [PATCH v3 15/16] MIPS: lantiq: remove old USB PHY initialisation Hauke Mehrtens
2017-05-28 18:40 ` [PATCH v3 16/16] MIPS: lantiq: Remove the arch/mips/lantiq/xway/reset.c implementation Hauke Mehrtens
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