From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Cc: Fabrizio Castro <fabrizio.castro.jz@renesas.com>,
Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
Magnus Damm <magnus.damm@gmail.com>,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-spi@vger.kernel.org, linux-renesas-soc@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-clk@vger.kernel.org,
Conor Dooley <conor.dooley@microchip.com>
Subject: Re: [PATCH v3 11/14] dt-bindings: spi: renesas,rzv2h-rspi: document RZ/T2H and RZ/N2H
Date: Mon, 10 Nov 2025 13:49:35 +0100 [thread overview]
Message-ID: <CAMuHMdWTH_uuQURgqQrg1RGDMwzdDAWFk__mS9+Gc8mcESfUyA@mail.gmail.com> (raw)
In-Reply-To: <20251105104151.1489281-12-cosmin-gabriel.tanislav.xa@renesas.com>
Hi Cosmin,
On Wed, 5 Nov 2025 at 11:44, Cosmin Tanislav
<cosmin-gabriel.tanislav.xa@renesas.com> wrote:
> The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs have four SPI
> peripherals.
>
> Compared to the previously supported RZ/V2H, these SoCs have a smaller
> FIFO, no resets, and only two clocks: PCLKSPIn and PCLK. PCLKSPIn,
> being the clock from which the SPI transfer clock is generated, is the
> equivalent of the TCLK from V2H.
>
> Document them, and use RZ/T2H as a fallback for RZ/N2H as the SPIs are
> entirely compatible.
>
> Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
> Acked-by: Conor Dooley <conor.dooley@microchip.com>
Thanks for your patch!
> --- a/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> +++ b/Documentation/devicetree/bindings/spi/renesas,rzv2h-rspi.yaml
> @@ -9,12 +9,15 @@ title: Renesas RZ/V2H(P) Renesas Serial Peripheral Interface (RSPI)
> maintainers:
> - Fabrizio Castro <fabrizio.castro.jz@renesas.com>
>
> -allOf:
> - - $ref: spi-controller.yaml#
> -
> properties:
> compatible:
> - const: renesas,r9a09g057-rspi # RZ/V2H(P)
> + oneOf:
> + - enum:
> + - renesas,r9a09g057-rspi # RZ/V2H(P)
> + - renesas,r9a09g077-rspi # RZ/T2H
> + - items:
> + - const: renesas,r9a09g087-rspi # RZ/N2H
> + - const: renesas,r9a09g077-rspi # RZ/T2H
>
> reg:
> maxItems: 1
> @@ -36,13 +39,12 @@ properties:
> - const: tx
>
> clocks:
> + minItems: 2
> maxItems: 3
>
> clock-names:
> - items:
> - - const: pclk
> - - const: pclk_sfr
> - - const: tclk
> + minItems: 2
> + maxItems: 3
>
> resets:
> maxItems: 2
> @@ -62,12 +64,55 @@ required:
> - interrupt-names
> - clocks
> - clock-names
> - - resets
> - - reset-names
> - power-domains
> - '#address-cells'
> - '#size-cells'
>
> +allOf:
> + - $ref: spi-controller.yaml#
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,r9a09g057-rspi
> + then:
> + properties:
> + clocks:
> + minItems: 3
> + maxItems: 3
No need for maxItems here (already at 3 above).
> + - if:
> + properties:
> + compatible:
> + contains:
> + enum:
> + - renesas,r9a09g077-rspi
> + - renesas,r9a09g087-rspi
No need for renesas,r9a09g087-rspi, as it implies renesas,r9a09g077-rspi
is present, too.
> + then:
> + properties:
> + clocks:
> + minItems: 2
No need for minItems.
> + maxItems: 2
The rest LGTM.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
next prev parent reply other threads:[~2025-11-10 12:49 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-05 10:41 [PATCH v3 00/14] Add RSPI support for RZ/T2H and RZ/N2H Cosmin Tanislav
2025-11-05 10:41 ` [PATCH v3 01/14] clk: renesas: r9a09g077: add SPI module clocks Cosmin Tanislav
2025-11-05 10:41 ` [PATCH v3 02/14] spi: rzv2h-rspi: make resets optional Cosmin Tanislav
2025-11-05 10:41 ` [PATCH v3 03/14] spi: rzv2h-rspi: make FIFO size chip-specific Cosmin Tanislav
2025-11-05 10:41 ` [PATCH v3 04/14] spi: rzv2h-rspi: make clocks chip-specific Cosmin Tanislav
2025-11-05 10:41 ` [PATCH v3 05/14] spi: rzv2h-rspi: move register writes out of rzv2h_rspi_setup_clock() Cosmin Tanislav
2025-11-05 10:41 ` [PATCH v3 06/14] spi: rzv2h-rspi: avoid recomputing transfer frequency Cosmin Tanislav
2025-11-05 10:41 ` [PATCH v3 07/14] spi: rzv2h-rspi: make transfer clock rate finding chip-specific Cosmin Tanislav
2025-11-05 10:41 ` [PATCH v3 08/14] spi: rzv2h-rspi: add support for using PCLK for transfer clock Cosmin Tanislav
2025-11-05 10:41 ` [PATCH v3 09/14] spi: rzv2h-rspi: add support for variable " Cosmin Tanislav
2025-11-05 10:41 ` [PATCH v3 10/14] spi: rzv2h-rspi: add support for loopback mode Cosmin Tanislav
2025-11-05 10:41 ` [PATCH v3 11/14] dt-bindings: spi: renesas,rzv2h-rspi: document RZ/T2H and RZ/N2H Cosmin Tanislav
2025-11-10 12:49 ` Geert Uytterhoeven [this message]
2025-11-05 10:41 ` [PATCH v3 12/14] spi: rzv2h-rspi: add support for " Cosmin Tanislav
2025-11-05 10:41 ` [PATCH v3 13/14] arm64: dts: renesas: r9a09g077: Add SPIs support Cosmin Tanislav
2025-11-05 10:41 ` [PATCH v3 14/14] arm64: dts: renesas: r9a09g087: " Cosmin Tanislav
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