[PATCH 0/8] spi: sirf: a bundle of fixes and cleanups

[PATCH 0/8] spi: sirf: a bundle of fixes and cleanups

[Barry Song]

From: Barry Song <Baohua.Song-kQvG35nSl+M@public.gmane.org>

this patchset fixes the cs_gpio, cmd_mode, make DMA optional etc.

Qipan Li (8):
  spi: sirf: correct spi gpio and hardware chipselect behaviour
  spi: sirf: request and free cs gpio in setup and cleanup callbacks
  spi: sirf: enable RX_IO_DMA_INT interrupt
  spi: sirf: fix 'cmd_transfer' function typos
  spi: sirf: add fifo reset/start for cmd transfer
  spi: sirf: set default spi frequency if it is not set
  spi: sirf: cleanup the indentation of marcos
  spi: sirf: make DMA transfer mode optional

 drivers/spi/Kconfig    |  10 ++++
 drivers/spi/spi-sirf.c | 148 ++++++++++++++++++++++++++-----------------------
 2 files changed, 89 insertions(+), 69 deletions(-)

-- 
2.1.0



Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
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[PATCH 1/8] spi: sirf: correct spi gpio and hardware chipselect behaviour

[Barry Song]

From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>

the old codes check the cs-gpios, if the gpio number is 0 like:
<&gpio, 0, 0>, the driver will use the only hardware chipselect.

this is wrong because of_spi_register_master() can read property
cs-gpios from device node and set the spi master's cs number and
gpio cs automatically based on whether the cs-gpios is valid.

this patch fixes the beviour of CSR spi driver and move to a core
level supported way.

Signed-off-by: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
Signed-off-by: Barry Song <Baohua.Song-kQvG35nSl+M@public.gmane.org>
---
 drivers/spi/spi-sirf.c | 86 +++++++++++++++++++-------------------------------
 1 file changed, 33 insertions(+), 53 deletions(-)

diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index 95ac276..44ec3bb 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -170,8 +170,7 @@ struct sirfsoc_spi {
 	 * command model
 	 */
 	bool	tx_by_cmd;
-
-	int chipselect[0];
+	bool	hw_cs;
 };
 
 static void spi_sirfsoc_rx_word_u8(struct sirfsoc_spi *sspi)
@@ -484,7 +483,7 @@ static void spi_sirfsoc_chipselect(struct spi_device *spi, int value)
 {
 	struct sirfsoc_spi *sspi = spi_master_get_devdata(spi->master);
 
-	if (sspi->chipselect[spi->chip_select] == 0) {
+	if (sspi->hw_cs) {
 		u32 regval = readl(sspi->base + SIRFSOC_SPI_CTRL);
 		switch (value) {
 		case BITBANG_CS_ACTIVE:
@@ -502,14 +501,13 @@ static void spi_sirfsoc_chipselect(struct spi_device *spi, int value)
 		}
 		writel(regval, sspi->base + SIRFSOC_SPI_CTRL);
 	} else {
-		int gpio = sspi->chipselect[spi->chip_select];
 		switch (value) {
 		case BITBANG_CS_ACTIVE:
-			gpio_direction_output(gpio,
+			gpio_direction_output(spi->cs_gpio,
 					spi->mode & SPI_CS_HIGH ? 1 : 0);
 			break;
 		case BITBANG_CS_INACTIVE:
-			gpio_direction_output(gpio,
+			gpio_direction_output(spi->cs_gpio,
 					spi->mode & SPI_CS_HIGH ? 0 : 1);
 			break;
 		}
@@ -603,8 +601,8 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
 		sspi->tx_by_cmd = false;
 	}
 	/*
-	 * set spi controller in RISC chipselect mode, we are controlling CS by
-	 * software BITBANG_CS_ACTIVE and BITBANG_CS_INACTIVE.
+	 * it should never set to hardware cs mode because in hardware cs mode,
+	 * cs signal can't controlled by driver.
 	 */
 	regval |= SIRFSOC_SPI_CS_IO_MODE;
 	writel(regval, sspi->base + SIRFSOC_SPI_CTRL);
@@ -627,9 +625,17 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
 
 static int spi_sirfsoc_setup(struct spi_device *spi)
 {
+	struct sirfsoc_spi *sspi;
+
 	if (!spi->max_speed_hz)
 		return -EINVAL;
 
+	sspi = spi_master_get_devdata(spi->master);
+
+	if (spi->cs_gpio == -ENOENT)
+		sspi->hw_cs = true;
+	else
+		sspi->hw_cs = false;
 	return spi_sirfsoc_setup_transfer(spi, NULL);
 }
 
@@ -638,19 +644,10 @@ static int spi_sirfsoc_probe(struct platform_device *pdev)
 	struct sirfsoc_spi *sspi;
 	struct spi_master *master;
 	struct resource *mem_res;
-	int num_cs, cs_gpio, irq;
-	int i;
-	int ret;
-
-	ret = of_property_read_u32(pdev->dev.of_node,
-			"sirf,spi-num-chipselects", &num_cs);
-	if (ret < 0) {
-		dev_err(&pdev->dev, "Unable to get chip select number\n");
-		goto err_cs;
-	}
+	int irq;
+	int i, ret;
 
-	master = spi_alloc_master(&pdev->dev,
-			sizeof(*sspi) + sizeof(int) * num_cs);
+	master = spi_alloc_master(&pdev->dev, sizeof(*sspi));
 	if (!master) {
 		dev_err(&pdev->dev, "Unable to allocate SPI master\n");
 		return -ENOMEM;
@@ -658,32 +655,6 @@ static int spi_sirfsoc_probe(struct platform_device *pdev)
 	platform_set_drvdata(pdev, master);
 	sspi = spi_master_get_devdata(master);
 
-	master->num_chipselect = num_cs;
-
-	for (i = 0; i < master->num_chipselect; i++) {
-		cs_gpio = of_get_named_gpio(pdev->dev.of_node, "cs-gpios", i);
-		if (cs_gpio < 0) {
-			dev_err(&pdev->dev, "can't get cs gpio from DT\n");
-			ret = -ENODEV;
-			goto free_master;
-		}
-
-		sspi->chipselect[i] = cs_gpio;
-		if (cs_gpio == 0)
-			continue; /* use cs from spi controller */
-
-		ret = gpio_request(cs_gpio, DRIVER_NAME);
-		if (ret) {
-			while (i > 0) {
-				i--;
-				if (sspi->chipselect[i] > 0)
-					gpio_free(sspi->chipselect[i]);
-			}
-			dev_err(&pdev->dev, "fail to request cs gpios\n");
-			goto free_master;
-		}
-	}
-
 	mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 	sspi->base = devm_ioremap_resource(&pdev->dev, mem_res);
 	if (IS_ERR(sspi->base)) {
@@ -753,7 +724,21 @@ static int spi_sirfsoc_probe(struct platform_device *pdev)
 	ret = spi_bitbang_start(&sspi->bitbang);
 	if (ret)
 		goto free_dummypage;
-
+	for (i = 0; master->cs_gpios && i < master->num_chipselect; i++) {
+		if (master->cs_gpios[i] == -ENOENT)
+			continue;
+		if (!gpio_is_valid(master->cs_gpios[i])) {
+			dev_err(&pdev->dev, "no valid gpio\n");
+			ret = -EINVAL;
+			goto free_dummypage;
+		}
+		ret = devm_gpio_request(&pdev->dev,
+				master->cs_gpios[i], DRIVER_NAME);
+		if (ret) {
+			dev_err(&pdev->dev, "failed to request gpio\n");
+			goto free_dummypage;
+		}
+	}
 	dev_info(&pdev->dev, "registerred, bus number = %d\n", master->bus_num);
 
 	return 0;
@@ -768,7 +753,7 @@ free_rx_dma:
 	dma_release_channel(sspi->rx_chan);
 free_master:
 	spi_master_put(master);
-err_cs:
+
 	return ret;
 }
 
@@ -776,16 +761,11 @@ static int  spi_sirfsoc_remove(struct platform_device *pdev)
 {
 	struct spi_master *master;
 	struct sirfsoc_spi *sspi;
-	int i;
 
 	master = platform_get_drvdata(pdev);
 	sspi = spi_master_get_devdata(master);
 
 	spi_bitbang_stop(&sspi->bitbang);
-	for (i = 0; i < master->num_chipselect; i++) {
-		if (sspi->chipselect[i] > 0)
-			gpio_free(sspi->chipselect[i]);
-	}
 	kfree(sspi->dummypage);
 	clk_disable_unprepare(sspi->clk);
 	clk_put(sspi->clk);
-- 
2.1.0



Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
More information can be found at www.csr.com. Keep up to date with CSR on our technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube, www.youtube.com/user/CSRplc, Facebook, www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at www.twitter.com/CSR_plc.
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Re: [PATCH 1/8] spi: sirf: correct spi gpio and hardware chipselect behaviour

[Mark Brown]

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On Tue, Sep 02, 2014 at 05:01:01PM +0800, Barry Song wrote:
> From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
> 
> the old codes check the cs-gpios, if the gpio number is 0 like:
> <&gpio, 0, 0>, the driver will use the only hardware chipselect.

Applied, thanks.

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[PATCH 2/8] spi: sirf: request and free cs gpio in setup and cleanup callbacks

[Barry Song]

From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>

move spi controller's gpio request work out from probe() to spi device
register stage, so after spi device register spi controller can deactive
device's gpio chipselect. old code can't do it because gpio request has
not be done until device register is finised in spi_bitbang_start.
and add cleanup function to free CS gpio.

Signed-off-by: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
Signed-off-by: Barry Song <Baohua.Song-kQvG35nSl+M@public.gmane.org>
---
 drivers/spi/spi-sirf.c | 58 +++++++++++++++++++++++++++++++++-----------------
 1 file changed, 38 insertions(+), 20 deletions(-)

diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index 44ec3bb..a21e423 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -626,7 +626,7 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
 static int spi_sirfsoc_setup(struct spi_device *spi)
 {
 	struct sirfsoc_spi *sspi;
-
+	int ret = 0;
 	if (!spi->max_speed_hz)
 		return -EINVAL;
 
@@ -634,9 +634,41 @@ static int spi_sirfsoc_setup(struct spi_device *spi)
 
 	if (spi->cs_gpio == -ENOENT)
 		sspi->hw_cs = true;
-	else
+	else {
 		sspi->hw_cs = false;
-	return spi_sirfsoc_setup_transfer(spi, NULL);
+		if (!spi_get_ctldata(spi)) {
+			void *cs = kmalloc(sizeof(int), GFP_KERNEL);
+			if (!cs) {
+				ret = -ENOMEM;
+				goto exit;
+			}
+			ret = gpio_is_valid(spi->cs_gpio);
+			if (!ret) {
+				dev_err(&spi->dev, "no valid gpio\n");
+				ret = -ENOENT;
+				goto exit;
+			}
+			ret = gpio_request(spi->cs_gpio, DRIVER_NAME);
+			if (ret) {
+				dev_err(&spi->dev, "failed to request gpio\n");
+				goto exit;
+			}
+			spi_set_ctldata(spi, cs);
+		}
+	}
+	writel(readl(sspi->base + SIRFSOC_SPI_CTRL) | SIRFSOC_SPI_CS_IO_MODE,
+			sspi->base + SIRFSOC_SPI_CTRL);
+	spi_sirfsoc_chipselect(spi, BITBANG_CS_INACTIVE);
+exit:
+	return ret;
+}
+
+static void spi_sirfsoc_cleanup(struct spi_device *spi)
+{
+	if (spi_get_ctldata(spi)) {
+		gpio_free(spi->cs_gpio);
+		kfree(spi_get_ctldata(spi));
+	}
 }
 
 static int spi_sirfsoc_probe(struct platform_device *pdev)
@@ -645,7 +677,7 @@ static int spi_sirfsoc_probe(struct platform_device *pdev)
 	struct spi_master *master;
 	struct resource *mem_res;
 	int irq;
-	int i, ret;
+	int ret;
 
 	master = spi_alloc_master(&pdev->dev, sizeof(*sspi));
 	if (!master) {
@@ -677,6 +709,7 @@ static int spi_sirfsoc_probe(struct platform_device *pdev)
 	sspi->bitbang.setup_transfer = spi_sirfsoc_setup_transfer;
 	sspi->bitbang.txrx_bufs = spi_sirfsoc_transfer;
 	sspi->bitbang.master->setup = spi_sirfsoc_setup;
+	sspi->bitbang.master->cleanup = spi_sirfsoc_cleanup;
 	master->bus_num = pdev->id;
 	master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST | SPI_CS_HIGH;
 	master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(12) |
@@ -723,22 +756,7 @@ static int spi_sirfsoc_probe(struct platform_device *pdev)
 
 	ret = spi_bitbang_start(&sspi->bitbang);
 	if (ret)
-		goto free_dummypage;
-	for (i = 0; master->cs_gpios && i < master->num_chipselect; i++) {
-		if (master->cs_gpios[i] == -ENOENT)
-			continue;
-		if (!gpio_is_valid(master->cs_gpios[i])) {
-			dev_err(&pdev->dev, "no valid gpio\n");
-			ret = -EINVAL;
-			goto free_dummypage;
-		}
-		ret = devm_gpio_request(&pdev->dev,
-				master->cs_gpios[i], DRIVER_NAME);
-		if (ret) {
-			dev_err(&pdev->dev, "failed to request gpio\n");
-			goto free_dummypage;
-		}
-	}
+		goto free_clk;
 	dev_info(&pdev->dev, "registerred, bus number = %d\n", master->bus_num);
 
 	return 0;
-- 
2.1.0



Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
More information can be found at www.csr.com. Keep up to date with CSR on our technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube, www.youtube.com/user/CSRplc, Facebook, www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at www.twitter.com/CSR_plc.
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Re: [PATCH 2/8] spi: sirf: request and free cs gpio in setup and cleanup callbacks

[Mark Brown]

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On Tue, Sep 02, 2014 at 05:01:02PM +0800, Barry Song wrote:
> From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
> 
> move spi controller's gpio request work out from probe() to spi device
> register stage, so after spi device register spi controller can deactive
> device's gpio chipselect. old code can't do it because gpio request has
> not be done until device register is finised in spi_bitbang_start.
> and add cleanup function to free CS gpio.

I'm not quite sure I understand the rationale here - as far as I can
tell this is making the GPIO request happen later not earlier so it's
not clear to me what the problem this is fixing in the existing code.
If the goal is to move the request around in the probe function why not
just move the existing code earlier in probe()?

This also won't interact well with deferred probe, though a better
solution here would be some kind of deferred device registration and
typically the link ordering will mean it won't be an issue when
everything is built in.

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Re: [PATCH 2/8] spi: sirf: request and free cs gpio in setup and cleanup callbacks

[swingboard]

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2014-09-05 3:19 GMT+08:00 Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>:
> On Tue, Sep 02, 2014 at 05:01:02PM +0800, Barry Song wrote:
>> From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
>>
>> move spi controller's gpio request work out from probe() to spi device
>> register stage, so after spi device register spi controller can deactive
>> device's gpio chipselect. old code can't do it because gpio request has
>> not be done until device register is finised in spi_bitbang_start.
>> and add cleanup function to free CS gpio.
>
> I'm not quite sure I understand the rationale here - as far as I can
> tell this is making the GPIO request happen later not earlier so it's
> not clear to me what the problem this is fixing in the existing code.
> If the goal is to move the request around in the probe function why not
> just move the existing code earlier in probe()?
>
> This also won't interact well with deferred probe, though a better
> solution here would be some kind of deferred device registration and
> typically the link ordering will mean it won't be an issue when
> everything is built in.

As GPIO cs can be high or low validate and the used GPIO pin with
default value may high or low,
it is need do spi device's chipselect invalidation work in spi_setup,
the patch purpose for it.
master->cs_gpios only assigned after spi_bitbang_start and the
function call spi_setup,
if keep the existing code there will result gpio usage before gpio request.
just move gpio request code in spi_sirfsoc_setup before gpio use.

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Re: [PATCH 2/8] spi: sirf: request and free cs gpio in setup and cleanup callbacks

[Mark Brown]

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On Fri, Sep 05, 2014 at 11:34:57AM +0800, swingboard wrote:
> 2014-09-05 3:19 GMT+08:00 Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>:

> > I'm not quite sure I understand the rationale here - as far as I can
> > tell this is making the GPIO request happen later not earlier so it's
> > not clear to me what the problem this is fixing in the existing code.
> > If the goal is to move the request around in the probe function why not
> > just move the existing code earlier in probe()?

> As GPIO cs can be high or low validate and the used GPIO pin with
> default value may high or low,
> it is need do spi device's chipselect invalidation work in spi_setup,
> the patch purpose for it.
> master->cs_gpios only assigned after spi_bitbang_start and the
> function call spi_setup,
> if keep the existing code there will result gpio usage before gpio request.
> just move gpio request code in spi_sirfsoc_setup before gpio use.

I'm still having a hard time understanding why pulling the code earlier
in probe isn't a better fix here.

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Re: [PATCH 2/8] spi: sirf: request and free cs gpio in setup and cleanup callbacks

[Barry Song]

On 14-9-6 下午9:57, "Mark Brown" <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:

>On Fri, Sep 05, 2014 at 11:34:57AM +0800, swingboard wrote:
>> 2014-09-05 3:19 GMT+08:00 Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>:
>
>> > I'm not quite sure I understand the rationale here - as far as I can
>> > tell this is making the GPIO request happen later not earlier so it's
>> > not clear to me what the problem this is fixing in the existing code.
>> > If the goal is to move the request around in the probe function why
>>not
>> > just move the existing code earlier in probe()?
>
>> As GPIO cs can be high or low validate and the used GPIO pin with
>> default value may high or low,
>> it is need do spi device's chipselect invalidation work in spi_setup,
>> the patch purpose for it.
>> master->cs_gpios only assigned after spi_bitbang_start and the
>> function call spi_setup,
>> if keep the existing code there will result gpio usage before gpio
>>request.
>> just move gpio request code in spi_sirfsoc_setup before gpio use.
>
>I'm still having a hard time understanding why pulling the code earlier
>in probe isn't a better fix here.

Gpio is unknown before spi_bitbang_start(). Everything is done in the big
routine spi_bitbang_start(). It includes:
Get cs_gpios, extend spi devices, and setup cs to de-active.

-barry


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Re: [PATCH 2/8] spi: sirf: request and free cs gpio in setup and cleanup callbacks

[Barry Song]

>>
>>> > I'm not quite sure I understand the rationale here - as far as I can
>>> > tell this is making the GPIO request happen later not earlier so it's
>>> > not clear to me what the problem this is fixing in the existing code.
>>> > If the goal is to move the request around in the probe function why
>>>not
>>> > just move the existing code earlier in probe()?
>>
>>> As GPIO cs can be high or low validate and the used GPIO pin with
>>> default value may high or low,
>>> it is need do spi device's chipselect invalidation work in spi_setup,
>>> the patch purpose for it.
>>> master->cs_gpios only assigned after spi_bitbang_start and the
>>> function call spi_setup,
>>> if keep the existing code there will result gpio usage before gpio
>>>request.
>>> just move gpio request code in spi_sirfsoc_setup before gpio use.
>>
>>I'm still having a hard time understanding why pulling the code earlier
>>in probe isn't a better fix here.
>
> Gpio is unknown before spi_bitbang_start(). Everything is done in the big
> routine spi_bitbang_start(). It includes:
> Get cs_gpios, extend spi devices, and setup cs to de-active.

Mark, i'd like to re-call this patch. "pulling the code earlier in
probe" is impossible based on current SPI core codes. because before
spi master is registerred,
cs_gpios is NULL. but once it is registered, cs_gpios are assigned in
spi_register_master:

1446 static int of_spi_register_master(struct spi_master *master)
1447 {
1448         int nb, i, *cs;
1449         struct device_node *np = master->dev.of_node;
1450
1451         if (!np)
1452                 return 0;
1453
1454         nb = of_gpio_named_count(np, "cs-gpios");
1455         master->num_chipselect = max_t(int, nb, master->num_chipselect);
1456
1457         /* Return error only for an incorrectly formed cs-gpios property */
1458         if (nb == 0 || nb == -ENOENT)
1459                 return 0;
1460         else if (nb < 0)
1461                 return nb;
1462
1463         cs = devm_kzalloc(&master->dev,
1464                           sizeof(int) * master->num_chipselect,
1465                           GFP_KERNEL);
1466         master->cs_gpios = cs;
1467
1468         if (!master->cs_gpios)
1469                 return -ENOMEM;
1470
1471         for (i = 0; i < master->num_chipselect; i++)
1472                 cs[i] = -ENOENT;
1473
1474         for (i = 0; i < nb; i++)
1475                 cs[i] = of_get_named_gpio(np, "cs-gpios", i);


we can get cs_gpios earlier in probe(), but this will definitely
reduplicated with SPI core.

and in the setup() stage, we need the CS to be de-active, so we need
the cs_gpio. that means we have to move gpio_request codes earlier,
but the current SPI core stop us from get ting gpio earlier than
spi_bitbang_start() being called. it looks the setup() itself is the
best place to get the cs.

drivers/spi/spi-clps711x.c is doing cs_gpios earlier in probe(), but
it is a non-OF driver, which will not have of_spi_register_master() to
set cs_gpios.


-barry
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Re: [PATCH 2/8] spi: sirf: request and free cs gpio in setup and cleanup callbacks

[Mark Brown]

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On Tue, Apr 28, 2015 at 11:36:51AM +0800, Barry Song wrote:

> Mark, i'd like to re-call this patch. "pulling the code earlier in
> probe" is impossible based on current SPI core codes. because before
> spi master is registerred,
> cs_gpios is NULL. but once it is registered, cs_gpios are assigned in
> spi_register_master:

I'm afraid I've forgotten what this patch is, sorry.  Can you resend
please?

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[PATCH 3/8] spi: sirf: enable RX_IO_DMA_INT interrupt

[Barry Song]

From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>

in spi interrupt handler, we need check RX_IO_DMA status to ensure
rx fifo have received the specify count data.

if not set, the while statement in spi isr function will keep loop,
at last, make the kernel hang.

Signed-off-by: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
Signed-off-by: Barry Song <Baohua.Song-kQvG35nSl+M@public.gmane.org>
---
 drivers/spi/spi-sirf.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index a21e423..7789385 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -437,7 +437,8 @@ static void spi_sirfsoc_pio_transfer(struct spi_device *spi,
 			sspi->tx_word(sspi);
 		writel(SIRFSOC_SPI_TXFIFO_EMPTY_INT_EN |
 			SIRFSOC_SPI_TX_UFLOW_INT_EN |
-			SIRFSOC_SPI_RX_OFLOW_INT_EN,
+			SIRFSOC_SPI_RX_OFLOW_INT_EN |
+			SIRFSOC_SPI_RX_IO_DMA_INT_EN,
 			sspi->base + SIRFSOC_SPI_INT_EN);
 		writel(SIRFSOC_SPI_RX_EN | SIRFSOC_SPI_TX_EN,
 			sspi->base + SIRFSOC_SPI_TX_RX_EN);
-- 
2.1.0



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Re: [PATCH 3/8] spi: sirf: enable RX_IO_DMA_INT interrupt

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 1251 bytes --]

On Tue, Sep 02, 2014 at 05:01:03PM +0800, Barry Song wrote:

> in spi interrupt handler, we need check RX_IO_DMA status to ensure
> rx fifo have received the specify count data.

> if not set, the while statement in spi isr function will keep loop,
> at last, make the kernel hang.

This changelog says we must check the status in the interrupt handler
but...

>  		writel(SIRFSOC_SPI_TXFIFO_EMPTY_INT_EN |
>  			SIRFSOC_SPI_TX_UFLOW_INT_EN |
> -			SIRFSOC_SPI_RX_OFLOW_INT_EN,
> +			SIRFSOC_SPI_RX_OFLOW_INT_EN |
> +			SIRFSOC_SPI_RX_IO_DMA_INT_EN,
>  			sspi->base + SIRFSOC_SPI_INT_EN);
>  		writel(SIRFSOC_SPI_RX_EN | SIRFSOC_SPI_TX_EN,
>  			sspi->base + SIRFSOC_SPI_TX_RX_EN);

...the change is actually just unmasking a bit in the interrupt mask
register and doesn't add anything to the interrupt handler?  Looking at
the code it seems that the actual issue is that the mask register causes
the interrupt handler not to see the mask bit since the mask not only
disables the interrupt but also causes the bit not to report in the
status register. 

That makes sense so I've applied this but please try to be clear about
things like this, it's hard to review code where the changelog doesn't
clearly match the code.

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[PATCH 4/8] spi: sirf: fix 'cmd_transfer' function typos

[Barry Song]

From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>

unify 'cmd_transfer' like 'pio_transfer' and 'dma_transfer' as void
function, and also change left_rx_word according to transfer result.

Signed-off-by: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
Signed-off-by: Barry Song <Baohua.Song-kQvG35nSl+M@public.gmane.org>
---
 drivers/spi/spi-sirf.c | 7 +++----
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index 7789385..93376a2 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -303,7 +303,7 @@ static void spi_sirfsoc_dma_fini_callback(void *data)
 	complete(dma_complete);
 }
 
-static int spi_sirfsoc_cmd_transfer(struct spi_device *spi,
+static void spi_sirfsoc_cmd_transfer(struct spi_device *spi,
 	struct spi_transfer *t)
 {
 	struct sirfsoc_spi *sspi;
@@ -325,10 +325,9 @@ static int spi_sirfsoc_cmd_transfer(struct spi_device *spi,
 		sspi->base + SIRFSOC_SPI_TX_RX_EN);
 	if (wait_for_completion_timeout(&sspi->tx_done, timeout) == 0) {
 		dev_err(&spi->dev, "cmd transfer timeout\n");
-		return 0;
+		return;
 	}
-
-	return t->len;
+	sspi->left_rx_word -= t->len;
 }
 
 static void spi_sirfsoc_dma_transfer(struct spi_device *spi,
-- 
2.1.0



Member of the CSR plc group of companies. CSR plc registered in England and Wales, registered number 4187346, registered office Churchill House, Cambridge Business Park, Cowley Road, Cambridge, CB4 0WZ, United Kingdom
More information can be found at www.csr.com. Keep up to date with CSR on our technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube, www.youtube.com/user/CSRplc, Facebook, www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at www.twitter.com/CSR_plc.
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Re: [PATCH 4/8] spi: sirf: fix 'cmd_transfer' function typos

[Mark Brown]

[-- Attachment #1: Type: text/plain, Size: 286 bytes --]

On Tue, Sep 02, 2014 at 05:01:04PM +0800, Barry Song wrote:
> From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
> 
> unify 'cmd_transfer' like 'pio_transfer' and 'dma_transfer' as void
> function, and also change left_rx_word according to transfer result.

Applied, thanks.

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