[PATCH 5/8] spi: sirf: add fifo reset/start for cmd transfer

[PATCH 5/8] spi: sirf: add fifo reset/start for cmd transfer

[Barry Song]

From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>

for command mode spi transfer, HW spec requires to do fifo reset work to
clear FIFO status.

Signed-off-by: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
Signed-off-by: Barry Song <Baohua.Song-kQvG35nSl+M@public.gmane.org>
---
 drivers/spi/spi-sirf.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index 93376a2..7499076 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -311,6 +311,8 @@ static void spi_sirfsoc_cmd_transfer(struct spi_device *spi,
 	u32 cmd;
 
 	sspi = spi_master_get_devdata(spi->master);
+	writel(SIRFSOC_SPI_FIFO_RESET, sspi->base + SIRFSOC_SPI_TXFIFO_OP);
+	writel(SIRFSOC_SPI_FIFO_START, sspi->base + SIRFSOC_SPI_TXFIFO_OP);
 	memcpy(&cmd, sspi->tx, t->len);
 	if (sspi->word_width == 1 && !(spi->mode & SPI_LSB_FIRST))
 		cmd = cpu_to_be32(cmd) >>
-- 
2.1.0



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[PATCH 6/8] spi: sirf: set default spi frequency if it is not set

[Barry Song]

From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>

give spi a default frequence if it is not set and the value is 0.

Signed-off-by: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
Signed-off-by: Barry Song <Baohua.Song-kQvG35nSl+M@public.gmane.org>
---
 drivers/spi/spi-sirf.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index 7499076..74835c2 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -134,6 +134,7 @@
 	ALIGNED(x->len) && (x->len < 2 * PAGE_SIZE))
 
 #define SIRFSOC_MAX_CMD_BYTES	4
+#define SIRFSOC_SPI_DEFAULT_FREQ 1000000
 
 struct sirfsoc_spi {
 	struct spi_bitbang bitbang;
@@ -630,7 +631,7 @@ static int spi_sirfsoc_setup(struct spi_device *spi)
 	struct sirfsoc_spi *sspi;
 	int ret = 0;
 	if (!spi->max_speed_hz)
-		return -EINVAL;
+		spi->max_speed_hz = SIRFSOC_SPI_DEFAULT_FREQ;
 
 	sspi = spi_master_get_devdata(spi->master);
 
-- 
2.1.0



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Re: [PATCH 6/8] spi: sirf: set default spi frequency if it is not set

[Mark Brown]

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On Tue, Sep 02, 2014 at 05:02:35PM +0800, Barry Song wrote:
> From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
> 
> give spi a default frequence if it is not set and the value is 0.

I think this is a good idea but I think we should do this in the SPI
core rather than this driver since the same thing is going to apply to
many drivers.  Can you do a patch for that?

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Re: [PATCH 6/8] spi: sirf: set default spi frequency if it is not set

[Barry Song]

2014-09-05 6:39 GMT+08:00 Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>:
> On Tue, Sep 02, 2014 at 05:02:35PM +0800, Barry Song wrote:
>> From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
>>

sorry, this patch actually has no effect now as it is outdated.

>> give spi a default frequence if it is not set and the value is 0.
>
> I think this is a good idea but I think we should do this in the SPI
> core rather than this driver since the same thing is going to apply to
> many drivers.  Can you do a patch for that?
>

this has been done by commit 052eb2d49,  sorry for making noise.

-barry
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[PATCH 7/8] spi: sirf: cleanup the indentation of marcos

[Barry Song]

From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>

let "#define" statement keep same indentation. the old code layout is
pretty ugly.

Signed-off-by: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
Signed-off-by: Barry Song <Baohua.Song-kQvG35nSl+M@public.gmane.org>
---
 drivers/spi/spi-sirf.c | 16 ++++++++--------
 1 file changed, 8 insertions(+), 8 deletions(-)

diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index 74835c2..67d07b2 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -62,15 +62,15 @@
 #define SIRFSOC_SPI_TRAN_DAT_FORMAT_12	(1 << 26)
 #define SIRFSOC_SPI_TRAN_DAT_FORMAT_16	(2 << 26)
 #define SIRFSOC_SPI_TRAN_DAT_FORMAT_32	(3 << 26)
-#define SIRFSOC_SPI_CMD_BYTE_NUM(x)		((x & 3) << 28)
-#define SIRFSOC_SPI_ENA_AUTO_CLR		BIT(30)
-#define SIRFSOC_SPI_MUL_DAT_MODE		BIT(31)
+#define SIRFSOC_SPI_CMD_BYTE_NUM(x)	((x & 3) << 28)
+#define SIRFSOC_SPI_ENA_AUTO_CLR	BIT(30)
+#define SIRFSOC_SPI_MUL_DAT_MODE	BIT(31)
 
 /* Interrupt Enable */
-#define SIRFSOC_SPI_RX_DONE_INT_EN		BIT(0)
-#define SIRFSOC_SPI_TX_DONE_INT_EN		BIT(1)
-#define SIRFSOC_SPI_RX_OFLOW_INT_EN		BIT(2)
-#define SIRFSOC_SPI_TX_UFLOW_INT_EN		BIT(3)
+#define SIRFSOC_SPI_RX_DONE_INT_EN	BIT(0)
+#define SIRFSOC_SPI_TX_DONE_INT_EN	BIT(1)
+#define SIRFSOC_SPI_RX_OFLOW_INT_EN	BIT(2)
+#define SIRFSOC_SPI_TX_UFLOW_INT_EN	BIT(3)
 #define SIRFSOC_SPI_RX_IO_DMA_INT_EN	BIT(4)
 #define SIRFSOC_SPI_TX_IO_DMA_INT_EN	BIT(5)
 #define SIRFSOC_SPI_RXFIFO_FULL_INT_EN	BIT(6)
@@ -79,7 +79,7 @@
 #define SIRFSOC_SPI_TXFIFO_THD_INT_EN	BIT(9)
 #define SIRFSOC_SPI_FRM_END_INT_EN	BIT(10)
 
-#define SIRFSOC_SPI_INT_MASK_ALL		0x1FFF
+#define SIRFSOC_SPI_INT_MASK_ALL	0x1FFF
 
 /* Interrupt status */
 #define SIRFSOC_SPI_RX_DONE		BIT(0)
-- 
2.1.0



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More information can be found at www.csr.com. Keep up to date with CSR on our technical blog, www.csr.com/blog, CSR people blog, www.csr.com/people, YouTube, www.youtube.com/user/CSRplc, Facebook, www.facebook.com/pages/CSR/191038434253534, or follow us on Twitter at www.twitter.com/CSR_plc.
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Re: [PATCH 7/8] spi: sirf: cleanup the indentation of marcos

[Mark Brown]

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On Tue, Sep 02, 2014 at 05:02:36PM +0800, Barry Song wrote:
> From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
> 
> let "#define" statement keep same indentation. the old code layout is
> pretty ugly.

Applied, thanks.

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[PATCH 8/8] spi: sirf: make DMA transfer mode optional

[Barry Song]

From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>

some customers want a pure PIO transfer mode even though DMA mode is
supported. here we give them a Kconfig option, but still keep the DMA
enabled in default.

Signed-off-by: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
Signed-off-by: Barry Song <Baohua.Song-kQvG35nSl+M@public.gmane.org>
---
 drivers/spi/Kconfig    | 10 ++++++++++
 drivers/spi/spi-sirf.c | 11 ++++++++++-
 2 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 62e2242..0f84bd8 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -477,6 +477,16 @@ config SPI_SIRF
 	help
 	  SPI driver for CSR SiRFprimaII SoCs
 
+config SPI_SIRF_DMA
+	bool "CSR SiRFprimaII/AtlasVI SPI DMA mode support"
+	depends on SPI_SIRF
+	default y
+	help
+	  CSR SPI driver support DMA and PIO mode, select it let SPI driver support DMA mode
+	  deselect it let SPI controller in PIO mode.
+	  In CSR SPI driver distinguish the config to decide what transfer mode use.
+	  Default configure value is y, if want pure PIO mode deselect it will be OK.
+
 config SPI_SUN4I
 	tristate "Allwinner A10 SoCs SPI controller"
 	depends on ARCH_SUNXI || COMPILE_TEST
diff --git a/drivers/spi/spi-sirf.c b/drivers/spi/spi-sirf.c
index 67d07b2..f934159 100644
--- a/drivers/spi/spi-sirf.c
+++ b/drivers/spi/spi-sirf.c
@@ -333,6 +333,7 @@ static void spi_sirfsoc_cmd_transfer(struct spi_device *spi,
 	sspi->left_rx_word -= t->len;
 }
 
+#ifdef CONFIG_SPI_SIRF_DMA
 static void spi_sirfsoc_dma_transfer(struct spi_device *spi,
 	struct spi_transfer *t)
 {
@@ -407,6 +408,7 @@ static void spi_sirfsoc_dma_transfer(struct spi_device *spi,
 	if (sspi->left_tx_word >= SIRFSOC_SPI_DAT_FRM_LEN_MAX)
 		writel(0, sspi->base + SIRFSOC_SPI_TX_RX_EN);
 }
+#endif
 
 static void spi_sirfsoc_pio_transfer(struct spi_device *spi,
 		struct spi_transfer *t)
@@ -474,8 +476,10 @@ static int spi_sirfsoc_transfer(struct spi_device *spi, struct spi_transfer *t)
 	 */
 	if (sspi->tx_by_cmd)
 		spi_sirfsoc_cmd_transfer(spi, t);
+#ifdef CONFIG_SPI_SIRF_DMA
 	else if (IS_DMA_VALID(t))
 		spi_sirfsoc_dma_transfer(spi, t);
+#endif
 	else
 		spi_sirfsoc_pio_transfer(spi, t);
 
@@ -526,6 +530,11 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
 	u32 regval;
 	u32 txfifo_ctrl, rxfifo_ctrl;
 	u32 fifo_size = SIRFSOC_SPI_FIFO_SIZE / 4;
+#ifdef CONFIG_SPI_SIRF_DMA
+	int spi_use_dma = 1;
+#else
+	int spi_use_dma = 0;
+#endif
 
 	sspi = spi_master_get_devdata(spi->master);
 
@@ -610,7 +619,7 @@ spi_sirfsoc_setup_transfer(struct spi_device *spi, struct spi_transfer *t)
 	regval |= SIRFSOC_SPI_CS_IO_MODE;
 	writel(regval, sspi->base + SIRFSOC_SPI_CTRL);
 
-	if (IS_DMA_VALID(t)) {
+	if (spi_use_dma && IS_DMA_VALID(t)) {
 		/* Enable DMA mode for RX, TX */
 		writel(0, sspi->base + SIRFSOC_SPI_TX_DMA_IO_CTRL);
 		writel(SIRFSOC_SPI_RX_DMA_FLUSH,
-- 
2.1.0



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Re: [PATCH 8/8] spi: sirf: make DMA transfer mode optional

[Mark Brown]

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On Tue, Sep 02, 2014 at 05:02:37PM +0800, Barry Song wrote:
> From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
> 
> some customers want a pure PIO transfer mode even though DMA mode is
> supported. here we give them a Kconfig option, but still keep the DMA
> enabled in default.

This doesn't feel like something for the standard kernel - can you
explain the benefit the customers think they're getting here?  It seems
like either this is something we should have as a more general option,
perhaps controllable at runtime or there's likely to be some bug or
other problem that's being worked around here.

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Re: [PATCH 8/8] spi: sirf: make DMA transfer mode optional

[Barry Song]

2014-09-05 6:41 GMT+08:00 Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>:
> On Tue, Sep 02, 2014 at 05:02:37PM +0800, Barry Song wrote:
>> From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
>>
>> some customers want a pure PIO transfer mode even though DMA mode is
>> supported. here we give them a Kconfig option, but still keep the DMA
>> enabled in default.
>
> This doesn't feel like something for the standard kernel - can you
> explain the benefit the customers think they're getting here?  It seems
> like either this is something we should have as a more general option,
> perhaps controllable at runtime or there's likely to be some bug or
> other problem that's being worked around here.

i have no strong technical reason for this as the benefit is not
always technical. you know....the commit log has provided the reason
for this patch.
the difficulty for me is maintaining the difference between mainline
and local codes, but if we have to maintain two copies,  we can.

-barry
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Re: [PATCH 8/8] spi: sirf: make DMA transfer mode optional

[Mark Brown]

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On Fri, Sep 05, 2014 at 04:14:17PM +0800, Barry Song wrote:

> i have no strong technical reason for this as the benefit is not
> always technical. you know....the commit log has provided the reason
> for this patch.
> the difficulty for me is maintaining the difference between mainline
> and local codes, but if we have to maintain two copies,  we can.

OK, well I think that's best though it would be better if we were able
to understand what benefit your customers believe they are seeing here
and hopefully address it in a better way.  Doing this sort of thing with
Kconfig options is not great, especially when you start trying to build
kernels that work with more than one board.

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Re: [PATCH 8/8] spi: sirf: make DMA transfer mode optional

[Barry Song]

On 14-9-6 下午9:55, "Mark Brown" <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org> wrote:

>On Fri, Sep 05, 2014 at 04:14:17PM +0800, Barry Song wrote:
>
>> i have no strong technical reason for this as the benefit is not
>> always technical. you know....the commit log has provided the reason
>> for this patch.
>> the difficulty for me is maintaining the difference between mainline
>> and local codes, but if we have to maintain two copies,  we can.
>
>OK, well I think that's best though it would be better if we were able
>to understand what benefit your customers believe they are seeing here
>and hopefully address it in a better way.  Doing this sort of thing with
>Kconfig options is not great, especially when you start trying to build
>kernels that work with more than one board.

my goal is doubling-check this with customers, if there is no problem,
drop this one as it is not a valid technical solution.

-barry



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Re: [PATCH 5/8] spi: sirf: add fifo reset/start for cmd transfer

[Mark Brown]

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On Tue, Sep 02, 2014 at 05:02:34PM +0800, Barry Song wrote:
> From: Qipan Li <Qipan.Li-kQvG35nSl+M@public.gmane.org>
> 
> for command mode spi transfer, HW spec requires to do fifo reset work to
> clear FIFO status.

Applied, thanks.  This seems like a bug fix so sohuld have been towards
the start of the series.

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