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Sun, 14 Jun 2026 22:13:11 -0700 (PDT) Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset=UTF-8 Date: Sun, 14 Jun 2026 22:13:10 -0700 Message-Id: From: "Rosen Penev" To: "Jisheng Zhang" , "Nathan Chancellor" Cc: "Mark Brown" , "Rosen Penev" , , Subject: Re: [PATCH] spi: cadence-xspi: Revert COMPILE_TEST support X-Mailer: aerc 0.21.0-0-g5549850facc2 References: <20260606-spi-cadence-xspi-revert-compile-testing-v1-1-76219ea378bd@kernel.org> <20260608180927.GA2211222@ax162> In-Reply-To: On Sun Jun 14, 2026 at 9:30 PM PDT, Jisheng Zhang wrote: > On Mon, Jun 08, 2026 at 11:09:27AM -0700, Nathan Chancellor wrote: >> On Mon, Jun 08, 2026 at 11:31:33AM +0100, Mark Brown wrote: >> > On Sat, Jun 06, 2026 at 03:26:04PM -0700, Nathan Chancellor wrote: >> > > Commit 0c5b5c40dc31 ("spi: cadence-xspi: Add COMPILE_TEST support") >> > > allows this driver to be built for 32-bit platforms, which causes a >> > > semantic conflict with commit 4954d4eca469 ("spi: cadence-xspi: Supp= ort >> > > 32bit and 64bit slave dma interface"), as readsq() and writesq() are >> > > only available when targeting 64-bit platforms: >> > >> > > config SPI_CADENCE_XSPI >> > > tristate "Cadence XSPI controller" >> > > - depends on HAS_IOMEM || COMPILE_TEST >> > > - depends on OF >> > > + depends on OF && HAS_IOMEM && 64BIT >> > > depends on SPI_MEM >> > >> > Why combine all these, they're not obviously related and HAS_IOMEM can >> > be turned off. >> >> This is just a straight revert of 0c5b5c40dc31, so it is just restoring >> how it was before that change. > > For the long run, it seems we need to add guard for the marvell support > code, then I will solve the readsq/writesq on 64BIT. But it's too late > to add new patches now, let me do this in next development window. This sounds like a great solution. > > BTW: d58ecc54bb09 ("spi: cadence: Add 64BIT Kconfig dependency") > introduced the 64BIT dependency.