From: Martin Sperl <kernel-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
To: Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
Cc: Mark Brown <broonie-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
lee-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
linux-spi-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
linux-rpi-kernel
<linux-rpi-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org>
Subject: Re: [PATCH 5/6] spi: bcm2835: add polling mode for transfers below 30us
Date: Tue, 31 Mar 2015 08:00:11 +0200 [thread overview]
Message-ID: <E15DA84C-4EF9-432A-ADA9-81789EAE379F@martin.sperl.org> (raw)
In-Reply-To: <551A1466.2020706-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
> On 31.03.2015, at 05:28, Stephen Warren <swarren-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org> wrote:
>> + /* check if we shall run in polling mode */
>> + xfer_time_us = tfr->len * 9 * 1000000 / spi_used_hz;
>
> Why 9 not 8; presumably thats bits per byte, and IIRC SPI doesn't have
> anything like I2C's ack bit per byte?
Well - the bcm2835 make a 1 cycle wait after each byte transferred.
Hence 9 bit actual length we need to account for.
Actually on top of that there are 3 more cycles when bringing the SPI
hardware active (at least with native CS) - but these are minimal
offsets.
Martin
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next prev parent reply other threads:[~2015-03-31 6:00 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2015-03-29 14:03 [PATCH 5/6] spi: bcm2835: add polling mode for transfers below 30us Martin Sperl
[not found] ` <808DC596-35BB-4A08-8CF4-DFAB6294636E-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
2015-03-30 4:27 ` Mark Brown
2015-03-31 3:28 ` Stephen Warren
[not found] ` <551A1466.2020706-3lzwWm7+Weoh9ZMKESR00Q@public.gmane.org>
2015-03-31 6:00 ` Martin Sperl [this message]
[not found] ` <E15DA84C-4EF9-432A-ADA9-81789EAE379F-TqfNSX0MhmxHKSADF0wUEw@public.gmane.org>
2015-04-01 15:14 ` Stephen Warren
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