From: Mark Brown <broonie@kernel.org>
To: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Cc: thierry.reding@gmail.com, jonathanh@nvidia.com,
linux-spi@vger.kernel.org, linux-tegra@vger.kernel.org,
skomatineni@nvidia.com, ldewangan@nvidia.com, robh+dt@kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
p.zabel@pengutronix.de
Subject: Re: [PATCH 6/6] spi: tegra210-quad: combined sequence mode
Date: Fri, 4 Feb 2022 14:09:21 +0000 [thread overview]
Message-ID: <Yf0zkdS2nqHOZjMG@sirena.org.uk> (raw)
In-Reply-To: <1643970576-31503-7-git-send-email-kyarlagadda@nvidia.com>
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On Fri, Feb 04, 2022 at 03:59:36PM +0530, Krishna Yarlagadda wrote:
> + /* Process individual transfer list */
> + list_for_each_entry(xfer, &msg->transfers, transfer_list) {
> + if (transfer_phase == CMD_TRANSFER) {
> + } else if (transfer_phase == ADDR_TRANSFER) {
> + } else {
Looks like you're writing a switch statement here...
> + /* X1 SDR mode */
> + cmd_config = tegra_qspi_cmd_config(false, 0,
> + xfer->len);
> + cmd_value = *((const u8 *)(xfer->tx_buf));
> +
> + len = xfer->len;
> + /* X1 SDR mode */
> + addr_config = tegra_qspi_addr_config(false, 0,
> + xfer->len);
> + address_value = *((const u32 *)(xfer->tx_buf));
> + /* Program Command, Address value in register */
> + tegra_qspi_writel(tqspi, cmd_value, QSPI_CMB_SEQ_CMD);
> + tegra_qspi_writel(tqspi, address_value,
> + QSPI_CMB_SEQ_ADDR);
> + /* Program Command and Address config in register */
> + tegra_qspi_writel(tqspi, cmd_config,
> + QSPI_CMB_SEQ_CMD_CFG);
> + tegra_qspi_writel(tqspi, addr_config,
> + QSPI_CMB_SEQ_ADDR_CFG);
It looks like the command and address have to be specific lengths? If
that's the case then
> + if (cdata->is_cmb_xfer && transfer_count == 3)
> + ret = tegra_qspi_combined_seq_xfer(tqspi, msg);
> + else
> + ret = tegra_qspi_non_combined_seq_xfer(tqspi, msg);
This check needs to be more specific. But like I said in reply to the
binding patch I don't see why we can't just pattern match on the data
without requiring a property here, we'd need to check that the message
is suitable no matter what.
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next prev parent reply other threads:[~2022-02-04 14:09 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-04 10:29 [PATCH 0/6] Tegra QUAD SPI combined sequence mode Krishna Yarlagadda
2022-02-04 10:29 ` [PATCH 1/6] spi: tegra210-quad: use device_reset method Krishna Yarlagadda
2022-02-04 10:29 ` [PATCH 2/6] dt-bindings: spi: Tegra234 QUAD SPI compatible Krishna Yarlagadda
2022-02-11 14:48 ` Rob Herring
2022-02-14 16:18 ` [PATCH 2/6] " Mark Brown
2022-02-04 10:29 ` [PATCH 3/6] spi: tegra210-quad: add new chips to compatible Krishna Yarlagadda
2022-02-04 10:29 ` [PATCH 4/6] spi: tegra210-quad: add acpi support Krishna Yarlagadda
2022-02-04 10:29 ` [PATCH 5/6] dt-bindings: spi: Tegra QUAD SPI combined sequence Krishna Yarlagadda
2022-02-04 13:47 ` Mark Brown
2022-02-04 10:29 ` [PATCH 6/6] spi: tegra210-quad: combined sequence mode Krishna Yarlagadda
2022-02-04 14:09 ` Mark Brown [this message]
2022-02-07 14:54 ` Krishna Yarlagadda
2022-02-07 15:05 ` Mark Brown
2022-02-07 15:40 ` Krishna Yarlagadda
2022-02-24 22:59 ` (subset) [PATCH 0/6] Tegra QUAD SPI " Mark Brown
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