From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6A181C38145 for ; Thu, 8 Sep 2022 13:02:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231492AbiIHNCy (ORCPT ); Thu, 8 Sep 2022 09:02:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:48662 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230505AbiIHNCx (ORCPT ); Thu, 8 Sep 2022 09:02:53 -0400 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B21DB99CF; Thu, 8 Sep 2022 06:02:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1662642172; x=1694178172; h=date:from:to:subject:message-id:references:mime-version: in-reply-to; bh=bYJujfPS+g+aa34Nnzz9+iwWbbOaoF9iNefXjiuxe/0=; b=FlUgaLENoZrqTIgmc8DF36grfcAxqicM/hB7OcY477u6ahcmfgr+rA6y rm/6CAU3gvlZ6K/Z6r9j0/iuTO2IiGO/kaenNq116auu6szZsYz5lbfFn tm6B191LIqScVv4nOqIe4rE5MwRqOudDUR+FT3hnOLroq8pV3Hs+NpWIn oPb8ZR+nmK9hXKTRN4yThVQvAcoJNUMrU6fJfd4ttqdmDt/E9kBME6mxs sBOTJDOFFILY4GlKCnYJkEQW6+t5gAIlvWmBrh6ay5kgVbBmF+X3oiMph GN3oSGSXcCgtQ4wFSb3oqc6cMAevrq+79uN5drJKFCEp0mqGN8igy70LS A==; X-IronPort-AV: E=McAfee;i="6500,9779,10463"; a="297159500" X-IronPort-AV: E=Sophos;i="5.93,300,1654585200"; d="scan'208";a="297159500" Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Sep 2022 06:02:52 -0700 X-IronPort-AV: E=Sophos;i="5.93,300,1654585200"; d="scan'208";a="592154862" Received: from smile.fi.intel.com ([10.237.72.54]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Sep 2022 06:02:51 -0700 Received: from andy by smile.fi.intel.com with local (Exim 4.96) (envelope-from ) id 1oWHBA-00A8A3-1B; Thu, 08 Sep 2022 16:02:48 +0300 Date: Thu, 8 Sep 2022 16:02:48 +0300 From: Andy Shevchenko To: Mark Brown , linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v1 1/1] spi: Group cs_change and cs_off flags together in struct spi_transfer Message-ID: References: <20220908125444.30727-1-andriy.shevchenko@linux.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220908125444.30727-1-andriy.shevchenko@linux.intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org On Thu, Sep 08, 2022 at 03:54:44PM +0300, Andy Shevchenko wrote: > The commit 5e0531f6b90a ("spi: Add capability to perform some transfer > with chipselect off") added a new flag but squezed it into a wrong > group of struct spi_transfer members (note that SPI_NBITS_* are macros > for easier interpretation of the tx_nbits and rx_nbits bitfields. Besides some small issues with the grammar above, I would like also to reshuffle the documentation part. Hence, please wait for v2 of this. -- With Best Regards, Andy Shevchenko