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([2001:818:ea56:d000:56e0:ceba:7da4:6673]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-48b068bc944sm4283186f8f.3.2026.09.30.23.54.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Sep 2026 23:54:17 -0700 (PDT) Message-ID: Subject: Re: [PATCH v2 2/2] spi: axi-spi-engine: fix stale SYNC IRQ pending in trigger_enable From: Nuno =?ISO-8859-1?Q?S=E1?= To: Mark Brown , Jonathan Santos Cc: linux-kernel@vger.kernel.org, linux-spi@vger.kernel.org, dlechner@baylibre.com, nuno.sa@analog.com, michael.hennerich@analog.com, jonath4nns@gmail.com, andriy.shevchenko@intel.com Date: Thu, 01 Oct 2026 07:55:45 +0100 In-Reply-To: <8ba05b99-36ac-4a76-ac11-e6ad92c631d4@sirena.org.uk> References: <8ba05b99-36ac-4a76-ac11-e6ad92c631d4@sirena.org.uk> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.60.2 (3.60.2-1.fc44) Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 On Wed, 2026-09-30 at 14:09 +0100, Mark Brown wrote: > On Tue, Sep 29, 2026 at 11:17:45PM -0300, Jonathan Santos wrote: > > spi_engine_trigger_enable() sends SYNC(1) and polls SYNC_ID, it never > > clears the INT_PENDING[SYNC] bit afterward. This leaves a stale pending > > interrupt that can fire spuriously when INT_SYNC is later enabled. >=20 > > + > > + /* Clear the stale SYNC pending bit so it doesn't fire when the IRQ i= s > > later enabled */ > > + writel_relaxed(SPI_ENGINE_INT_SYNC, spi_engine->base + > > SPI_ENGINE_REG_INT_PENDING); > > + > > =C2=A0 if (ret) > > =C2=A0 return ret; >=20 > I'm not seeing anything here for the issue with ensuring posted writes > are completed before we drop the lock?=C2=A0 The write may not be visible= on > enother CPU, we need a read from the controller or something. Just for my understanding, why would it be an issue? The trigger register s= eems to only be accessible from the trigger callbacks which are protected by a lock= where we have implied barriers. Im sure I'm missing what can go wrong here :) - Nuno S=C3=A1