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From: Michael Walle <michael@walle.cc>
To: Tudor Ambarus <tudor.ambarus@gmail.com>
Cc: Mark Brown <broonie@kernel.org>,
	tudor.ambarus@microchip.com, alexandre.belloni@bootlin.com,
	claudiu.beznea@microchip.com, devicetree@vger.kernel.org,
	krzysztof.kozlowski+dt@linaro.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
	linux-spi@vger.kernel.org, nicolas.ferre@microchip.com,
	robh+dt@kernel.org
Subject: Re: [PATCH 1/8] spi: dt-bindings: Introduce spi-cs-setup-ns property
Date: Mon, 02 Jan 2023 12:48:48 +0100	[thread overview]
Message-ID: <a2f58ad34ba74ff135852bc1e24da4d6@walle.cc> (raw)
In-Reply-To: <28da9e33-57e8-7ac1-7e6c-13c297a945d6@gmail.com>

Hi,

Am 2023-01-02 10:37, schrieb Tudor Ambarus:
> Hi,
> 
> On 18.11.2022 17:30, Mark Brown wrote:
>> On Fri, Nov 18, 2022 at 03:14:58PM +0100, Michael Walle wrote:
>>> From: Tudor Ambarus <tudor.ambarus@microchip.com>
>> 
>>>> +  spi-cs-setup-ns:
>>>> +    description:
>>>> +      Delay in nanosecods to be introduced by the controller after 
>>>> CS is
>>>> +      asserted.
>> 
>>> Does this need a type as the spi-cs-setup-ns is apparently just 
>>> 16bit? At
>>> least the driver uses it that way.
>> 
>>> But IMHO this should just be a normal uint32 value to be consistent 
>>> with
>>> all the other properties. Also the max value with 16bit will be 
>>> 'just'
>>> 65us.
>> 
>> Making it 32 bit does seem safer.  I've applied the series
> 
> Thanks. There are few implications to consider before making this prop 
> a
> u32, and I'd like to check them with you.
> 
> struct spi_delay will have to be updated to have a u32 value, now it's 
> a
> u16. This means that we'll have to update spi_delay_to_ns() to either
> return a s64 or to add a u64 *delay parameter to the function so that 
> we
> can still handle the conversions from usecs and the error codes in the
> SPI_DELAY_UNIT_SCK case. Then all its callers have to be updated to
> consider the u64 delay.

I was talking about the device tree property. Even if the driver 
continue
to use just 16bit, the DT property could be 32bit IMHO.

At the moment, the schema says its 32bit (if I'm not mistaken, because
it doesn't have a type), but the driver will parse the property as
16bit and your device tree also has this /bits/ thingy. So regardless
if the driver is using 16bit or 32bit for the value, there seems to be
a discrepancy between the schema and the devicetree (and driver).

All other properties are just the regular 32bit values, thus I was
suggesting to change the DT property to 32bit.

-michael

> I don't know what to say, I'm in between. 65us delays are improbable,
> but I'm fine to update this as well. Let me know your preference.
> 
> Thanks,
> ta

  reply	other threads:[~2023-01-02 11:49 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-17 10:52 [PATCH 0/8] spi: Introduce spi-cs-setup-ns dt property Tudor Ambarus
2022-11-17 10:52 ` [PATCH 1/8] spi: dt-bindings: Introduce spi-cs-setup-ns property Tudor Ambarus
2022-11-18 14:14   ` Michael Walle
2022-11-18 15:30     ` Mark Brown
2023-01-02  9:37       ` Tudor Ambarus
2023-01-02 11:48         ` Michael Walle [this message]
2023-01-02 12:11           ` Tudor Ambarus
2023-01-02 13:21             ` Michael Walle
2022-11-17 10:52 ` [PATCH 2/8] spi: " Tudor Ambarus
2022-11-17 10:52 ` [PATCH 3/8] spi: Reintroduce spi_set_cs_timing() Tudor Ambarus
2022-11-17 10:52 ` [PATCH 4/8] spi: atmel-quadspi: Add support for configuring CS timing Tudor Ambarus
2022-11-17 10:52 ` [PATCH 5/8] ARM: dts: at91-sama5d27_wlsom1: Set sst26vf064b SPI NOR flash at its maximum frequency Tudor Ambarus
2023-03-28  8:51   ` Nicolas Ferre
2023-03-28  9:36     ` Tudor Ambarus
2022-11-17 10:52 ` [PATCH 6/8] ARM: dts: at91-sama5d27_som1: " Tudor Ambarus
2022-11-17 10:52 ` [PATCH 7/8] ARM: dts: at91: sama5d2_icp: " Tudor Ambarus
2022-11-17 10:52 ` [PATCH 8/8] ARM: dts: at91: sam9x60ek: " Tudor Ambarus
2022-11-18 14:04 ` (subset) [PATCH 0/8] spi: Introduce spi-cs-setup-ns dt property Mark Brown

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