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From: Marcelo Schmitt <marcelo.schmitt1@gmail.com>
To: David Lechner <dlechner@baylibre.com>
Cc: "Mark Brown" <broonie@kernel.org>,
	"Rob Herring" <robh@kernel.org>,
	"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
	"Conor Dooley" <conor+dt@kernel.org>,
	"Marcelo Schmitt" <marcelo.schmitt@analog.com>,
	"Michael Hennerich" <michael.hennerich@analog.com>,
	"Nuno Sá" <nuno.sa@analog.com>,
	"Jonathan Cameron" <jic23@kernel.org>,
	"Andy Shevchenko" <andy@kernel.org>,
	"Sean Anderson" <sean.anderson@linux.dev>,
	linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-iio@vger.kernel.org
Subject: Re: [PATCH 3/6] spi: add multi_bus_mode field to struct spi_transfer
Date: Wed, 15 Oct 2025 17:21:26 -0300	[thread overview]
Message-ID: <aPACRllAorjG47L7@debian-BULLSEYE-live-builder-AMD64> (raw)
In-Reply-To: <20251014-spi-add-multi-bus-support-v1-3-2098c12d6f5f@baylibre.com>

On 10/14, David Lechner wrote:
> Add a new multi_bus_mode field to struct spi_transfer to allow
> peripherals that support multiple SPI buses to be used with a single
> SPI controller.
> 
> This requires both the peripheral and the controller to have multiple
> serializers connected to separate data buses. It could also be used with
> a single controller and multiple peripherals that are functioning as a
> single logical device (similar to parallel memories).
> 
> The possible values for this field have the following semantics:
> 
> - SPI_MULTI_BUS_MODE_SINGLE: Only use the first bus. This means that it
>     it is operating just like a conventional SPI bus. It is the default
>     value so that existing drivers do not need to be modified.
> 
>     Example:
>         tx_buf[0] = 0x88;
> 
>         struct spi_transfer xfer = {
>             .tx_buf = tx_buf,
>             .len = 1,
>         };
> 
>         spi_sync_transfer(spi, &xfer, 1);
> 
>         controller    > data bits >     peripheral
>         ----------   ----------------   ----------
>             SDO 0    0-0-0-1-0-0-0-1    SDI 0
> 
> - SPI_MULTI_BUS_MODE_MIRROR: Send a single data word over all of the
>     buses at the same time. This only makes sense for writes and not
>     for reads.
> 
>     Example:
>         tx_buf[0] = 0x88;
> 
>         struct spi_transfer xfer = {
>             .tx_buf = tx_buf,
>             .len = 1,
>             .multi_bus_mode = SPI_MULTI_BUS_MODE_MIRROR,
>         };
> 
>         spi_sync_transfer(spi, &xfer, 1);
> 
>         controller    > data bits >     peripheral
>         ----------   ----------------   ----------
>             SDO 0    0-0-0-1-0-0-0-1    SDI 0
>             SDO 1    0-0-0-1-0-0-0-1    SDI 1
> 
> - SPI_MULTI_BUS_MODE_STRIPE: Send or receive two different data words at
>     the same time, one on each bus.
> 
>     Example:
>         struct spi_transfer xfer = {
>             .rx_buf = rx_buf,
>             .len = 2, /* must be multiple of number of buses */
>             .multi_bus_mode = SPI_MULTI_BUS_MODE_STRIPE,
>         };
> 
>         spi_sync_transfer(spi, &xfer, 1);
> 
>         controller    < data bits <     peripheral
>         ----------   ----------------   ----------
>             SDI 0    0-0-0-1-0-0-0-1    SDO 0
>             SDI 1    1-0-0-0-1-0-0-0    SDO 1
> 
>         After the transfer, rx_buf[0] == 0x11 (word from SDO 0) and
>         rx_buf[1] == 0x88 (word from SDO 1). If the transfer was longer,
>         the data would continue in an alternating fashion.
> 
Can the above explanation be added to the documentation?
Maybe spi-summary.rst or a new file?

> Signed-off-by: David Lechner <dlechner@baylibre.com>
> ---

Nevertheless,
Acked-by: Marcelo Schmitt <marcelo.schmitt@analog.com>

  parent reply	other threads:[~2025-10-15 20:20 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-14 22:02 [PATCH 0/6] spi: add multi-bus support David Lechner
2025-10-14 22:02 ` [PATCH 1/6] dt-bindings: spi: Add spi-buses property David Lechner
2025-10-21 14:21   ` Rob Herring
2025-10-21 14:59     ` David Lechner
2025-10-30 13:51       ` Rob Herring
2025-10-30 22:42         ` David Lechner
2025-11-10 17:04           ` Mark Brown
2025-11-12 16:52             ` David Lechner
2025-10-14 22:02 ` [PATCH 2/6] spi: Support multi-bus controllers David Lechner
2025-10-15 10:06   ` Nuno Sá
2025-10-15 20:16   ` Marcelo Schmitt
2025-10-14 22:02 ` [PATCH 3/6] spi: add multi_bus_mode field to struct spi_transfer David Lechner
2025-10-15 10:16   ` Nuno Sá
2025-10-15 12:01     ` Mark Brown
2025-10-15 14:43       ` Nuno Sá
2025-10-15 15:18         ` Mark Brown
2025-10-15 16:15           ` David Lechner
2025-10-15 16:43             ` Nuno Sá
2025-10-15 18:38               ` David Lechner
2025-10-16  9:08                 ` Nuno Sá
2025-10-16 15:25                   ` David Lechner
2025-10-17 12:36                     ` Nuno Sá
2025-10-15 20:21   ` Marcelo Schmitt [this message]
2025-10-14 22:02 ` [PATCH 4/6] spi: axi-spi-engine: support SPI_MULTI_BUS_MODE_STRIPE David Lechner
2025-10-15 10:30   ` Nuno Sá
2025-10-15 12:03     ` Mark Brown
2025-10-15 16:29     ` David Lechner
2025-10-16  9:11       ` Nuno Sá
2025-10-15 20:53   ` Marcelo Schmitt
2025-10-15 22:01     ` David Lechner
2025-10-14 22:02 ` [PATCH 5/6] dt-bindings: iio: adc: adi,ad7380: add spi-buses property David Lechner
2025-10-14 22:02 ` [PATCH 6/6] iio: adc: ad7380: Add support for multiple SPI buses David Lechner
2025-10-15 10:36   ` Nuno Sá
2025-10-15 18:46     ` David Lechner
2025-10-18 18:10   ` Jonathan Cameron

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