From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: William Qiu <william.qiu@starfivetech.com>,
devicetree@vger.kernel.org, linux-spi@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-riscv@lists.infradead.org
Cc: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Emil Renner Berthing <kernel@esmil.dk>,
Linus Walleij <linus.walleij@linaro.org>
Subject: Re: [RESEND v1 1/2] dt-binding: spi: constrain minItems of clocks and clock-names
Date: Wed, 5 Jul 2023 08:00:02 +0200 [thread overview]
Message-ID: <afcf67e3-a017-b747-a0cf-284a87a8d24a@linaro.org> (raw)
In-Reply-To: <c5027d42-b9be-090d-bd43-86c9b1448c99@starfivetech.com>
On 05/07/2023 05:37, William Qiu wrote:
>>> ---
>>> Documentation/devicetree/bindings/spi/spi-pl022.yaml | 11 ++++++++---
>>> 1 file changed, 8 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/Documentation/devicetree/bindings/spi/spi-pl022.yaml b/Documentation/devicetree/bindings/spi/spi-pl022.yaml
>>> index 91e540a92faf..42bb34c39971 100644
>>> --- a/Documentation/devicetree/bindings/spi/spi-pl022.yaml
>>> +++ b/Documentation/devicetree/bindings/spi/spi-pl022.yaml
>>> @@ -11,6 +11,7 @@ maintainers:
>>>
>>> allOf:
>>> - $ref: spi-controller.yaml#
>>> + - $ref: /schemas/arm/primecell.yaml#
>>
>> This looks unrelated, so keep it as separate commit with its own rationale.
>>
> Because "arm,primecell-periphid" is need in JH7110 SoC, so I added them in
> one commit, so do I need to put them in two commit?
You need to provide rationale why this is needed. I would assume this is
needed for every primecell, not only JH7110, right?
Best regards,
Krzysztof
next prev parent reply other threads:[~2023-07-05 6:00 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-07-04 9:21 [RESEND v1 0/2] Add SPI module for StarFive JH7110 SoC William Qiu
2023-07-04 9:21 ` [RESEND v1 1/2] dt-binding: spi: constrain minItems of clocks and clock-names William Qiu
2023-07-04 9:38 ` Krzysztof Kozlowski
2023-07-05 3:37 ` William Qiu
2023-07-05 6:00 ` Krzysztof Kozlowski [this message]
2023-07-05 6:20 ` William Qiu
2023-07-04 9:22 ` [RESEND v1 2/2] riscv: dts: starfive: Add spi node for JH7110 SoC William Qiu
2023-07-04 9:39 ` Krzysztof Kozlowski
2023-07-04 12:26 ` Mark Brown
2023-07-04 12:27 ` Krzysztof Kozlowski
2023-07-04 13:16 ` Mark Brown
2023-07-04 13:21 ` Krzysztof Kozlowski
2023-07-04 14:13 ` Mark Brown
2023-07-04 16:41 ` Conor Dooley
2023-07-05 3:40 ` William Qiu
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