Linux SPI subsystem development
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From: Jisheng Zhang <jszhang@kernel.org>
To: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Mark Brown <broonie@kernel.org>, Rob Herring <robh@kernel.org>,
	Krzysztof Kozlowski <krzk+dt@kernel.org>,
	Conor Dooley <conor+dt@kernel.org>,
	linux-spi@vger.kernel.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] spi: dt-bindings: cdns,xspi: add sdma-io-width
Date: Sat, 30 May 2026 20:36:07 +0800	[thread overview]
Message-ID: <ahrZt5BI46oFXCBO@xhacker> (raw)
In-Reply-To: <3eaa70e0-4284-4c35-a5d5-42afa3087eea@kernel.org>

On Wed, May 20, 2026 at 04:21:05PM +0200, Krzysztof Kozlowski wrote:
> On 20/05/2026 15:18, Jisheng Zhang wrote:
> > On Wed, May 20, 2026 at 03:22:07PM +0200, Krzysztof Kozlowski wrote:
> >> On 20/05/2026 14:30, Mark Brown wrote:
> >>> On Wed, May 20, 2026 at 02:16:21PM +0200, Krzysztof Kozlowski wrote:
> >>>> On 20/05/2026 13:48, Jisheng Zhang wrote:
> >>>
> >>>>> If you mean "Why this cannot be deduced from the compatible?", I think
> >>>>> the slave dma port is part of the cdns xspi, so its io width belongs
> >>>>> to xSPI device property.
> >>>>> From another side, we have seen such property in other drivers such as
> >>>>> the reg-io-width for the dw spi DW_SPI_DR port io width.
> >>>
> >>>> So you mean it depends on SPI device? Then why spi-peripheral-props is
> >>>> not applicable here?
> >>>
> >>> That will be controller side, not device side.
> >>>
> >>>> If this is not bus width, but DMA-something, is not really then SPI
> >>>> device dependent, but rather DMA controller limitation, so either
> >>>> deducible from compatible or something else is missing here.
> >>>
> >>> My understanding is that this is a connection between the SPI and DMA
> >>> controllers so it's not as obvious as it could be which side of that
> >>> link should have the property, eg:
> >>>
> >>>   https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/tools/silicon-solutions/design-ip/controller-ip-qspi.pdf
> >>>
> >>> shows a separate direct connection between the DMA controller and the
> >>> xSPI controller, the DMA controller isn't interacting with registers on
> >>> the CPU visible buses.  The width is probably a design time configurable
> >>> option on both sides of the link.
> >>
> >> Yes and that sounds a lot specific to particular controller, thus should
> >> be implied by / deducible from the compatible.
> > 
> > This is IP feature, so if we couple the IP's feature with platform
> > compatible, I would see some unnecessary LoCs. For example,
> > Let's assume the IP has 10 users, they all support 4 bytes io width,
> > other features are the same. 
> > 
> > If implied by the compatible string, we need to add 10 compatible
> > string support both in code and dt-bindings.
> 
> You always need 10 compatible strings in bindings.
> 
> But driver would need only one, since devices are compatible as you
> described.

Hi all,

Update: after carefully reading the registers' document, I found the
slave dma data width can be known by checking CTRL_FEATURES_REG's
DMA_DATA_WIDTH bit, we can don't need the DT property any more. I'm
cooking v2.

Thanks for all the review comments

> 
> > 
> > vs
> > 
> > If supported by "sdma-io-width", nothing is needed after this patch
> > 
> > IMHO, the 2nd sounds better, what do you think?
> 
> We answered this in writing bindings. Properties are not replacement for
> specific compatible. I don't know how to write that sentence in bindings
> clearer - it's exactly this case.
> 
> Best regards,
> Krzysztof

  reply	other threads:[~2026-05-30 12:55 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-05-11  3:17 [PATCH 0/2] spi: cadence-xspi: support 4bytes sdma-io-width Jisheng Zhang
2026-05-11  3:17 ` [PATCH 1/2] spi: dt-bindings: cdns,xspi: add sdma-io-width Jisheng Zhang
2026-05-15  8:00   ` Krzysztof Kozlowski
2026-05-19 23:38     ` Jisheng Zhang
2026-05-20  7:09       ` Krzysztof Kozlowski
2026-05-20 11:48         ` Jisheng Zhang
2026-05-20 12:16           ` Krzysztof Kozlowski
2026-05-20 12:17             ` Jisheng Zhang
2026-05-20 12:30             ` Mark Brown
2026-05-20 13:22               ` Krzysztof Kozlowski
2026-05-20 13:18                 ` Jisheng Zhang
2026-05-20 14:21                   ` Krzysztof Kozlowski
2026-05-30 12:36                     ` Jisheng Zhang [this message]
2026-05-11  3:17 ` [PATCH 2/2] spi: cadence-xspi: support 4bytes sdma-io-width Jisheng Zhang

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