From: Jisheng Zhang <jszhang@kernel.org>
To: Nathan Chancellor <nathan@kernel.org>
Cc: Mark Brown <broonie@kernel.org>, Rosen Penev <rosenp@gmail.com>,
linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH] spi: cadence-xspi: Revert COMPILE_TEST support
Date: Mon, 15 Jun 2026 12:30:13 +0800 [thread overview]
Message-ID: <ai9_1ZrxD28xE-U6@xhacker> (raw)
In-Reply-To: <20260608180927.GA2211222@ax162>
On Mon, Jun 08, 2026 at 11:09:27AM -0700, Nathan Chancellor wrote:
> On Mon, Jun 08, 2026 at 11:31:33AM +0100, Mark Brown wrote:
> > On Sat, Jun 06, 2026 at 03:26:04PM -0700, Nathan Chancellor wrote:
> > > Commit 0c5b5c40dc31 ("spi: cadence-xspi: Add COMPILE_TEST support")
> > > allows this driver to be built for 32-bit platforms, which causes a
> > > semantic conflict with commit 4954d4eca469 ("spi: cadence-xspi: Support
> > > 32bit and 64bit slave dma interface"), as readsq() and writesq() are
> > > only available when targeting 64-bit platforms:
> >
> > > config SPI_CADENCE_XSPI
> > > tristate "Cadence XSPI controller"
> > > - depends on HAS_IOMEM || COMPILE_TEST
> > > - depends on OF
> > > + depends on OF && HAS_IOMEM && 64BIT
> > > depends on SPI_MEM
> >
> > Why combine all these, they're not obviously related and HAS_IOMEM can
> > be turned off.
>
> This is just a straight revert of 0c5b5c40dc31, so it is just restoring
> how it was before that change.
For the long run, it seems we need to add guard for the marvell support
code, then I will solve the readsq/writesq on 64BIT. But it's too late
to add new patches now, let me do this in next development window.
BTW: d58ecc54bb09 ("spi: cadence: Add 64BIT Kconfig dependency")
introduced the 64BIT dependency.
next prev parent reply other threads:[~2026-06-15 4:49 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-06 22:26 [PATCH] spi: cadence-xspi: Revert COMPILE_TEST support Nathan Chancellor
2026-06-08 7:50 ` Uwe Kleine-König
2026-06-08 10:31 ` Mark Brown
2026-06-08 18:09 ` Nathan Chancellor
2026-06-15 4:30 ` Jisheng Zhang [this message]
2026-06-15 5:13 ` Rosen Penev
2026-06-08 12:18 ` Mark Brown
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