[PATCHv4] Add SPI nodes to Altera SOCFPGA DT

[PATCHv4] Add SPI nodes to Altera SOCFPGA DT

[tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx]

From: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>

This patch adds the SPI nodes to the SOCFPGA device tree. Both
nodes are left in the disabled state since no devices are
present on the development boards.

Thor Thayer (1):
  arm: dts: socfpga: Add SPI nodes to SOCFPGA DT.

 arch/arm/boot/dts/socfpga.dtsi |   22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

-- 
1.7.9.5

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[PATCHv4] arm: dts: socfpga: Add SPI nodes to SOCFPGA DT.

[tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx]

From: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>

Add 2 SPI nodes to SOCFPGA device tree.

Signed-off-by: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
---
v2: Remove extra files. Move SPIDEV into board specific file.

v3: Remove dts file since SPIDEV is not allowed.

v4: Remove bus-num since it is unused and not defined in bindings.
---
 arch/arm/boot/dts/socfpga.dtsi |   22 ++++++++++++++++++++++
 1 file changed, 22 insertions(+)

diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 4d77ad6..2792e6c 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -628,6 +628,28 @@
 			clock-names = "biu", "ciu";
 		};
 
+		spi0: spi@fff00000 {
+			compatible = "snps,dw-apb-ssi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfff00000 0x1000>;
+			interrupts = <0 154 4>;
+			num-cs = <4>;
+			clocks = <&spi_m_clk>;
+			status = "disabled";
+		};
+
+		spi1: spi@fff01000 {
+			compatible = "snps,dw-apb-ssi";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xfff01000 0x1000>;
+			interrupts = <0 156 4>;
+			num-cs = <4>;
+			clocks = <&spi_m_clk>;
+			status = "disabled";
+		};
+
 		/* Local timer */
 		timer@fffec600 {
 			compatible = "arm,cortex-a9-twd-timer";
-- 
1.7.9.5

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Re: [PATCHv4] arm: dts: socfpga: Add SPI nodes to SOCFPGA DT.

[Dinh Nguyen]

On Tue, 21 Oct 2014, tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org wrote:

> From: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
> 
> Add 2 SPI nodes to SOCFPGA device tree.
> 
> Signed-off-by: Thor Thayer <tthayer-yzvPICuk2ABMcg4IHK0kFoH6Mc4MB0Vx@public.gmane.org>
> ---
> v2: Remove extra files. Move SPIDEV into board specific file.
> 
> v3: Remove dts file since SPIDEV is not allowed.
> 
> v4: Remove bus-num since it is unused and not defined in bindings.
> ---
>  arch/arm/boot/dts/socfpga.dtsi |   22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
> index 4d77ad6..2792e6c 100644
> --- a/arch/arm/boot/dts/socfpga.dtsi
> +++ b/arch/arm/boot/dts/socfpga.dtsi
> @@ -628,6 +628,28 @@
>  			clock-names = "biu", "ciu";
>  		};
>  
> +		spi0: spi@fff00000 {
> +			compatible = "snps,dw-apb-ssi";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			reg = <0xfff00000 0x1000>;
> +			interrupts = <0 154 4>;
> +			num-cs = <4>;
> +			clocks = <&spi_m_clk>;
> +			status = "disabled";
> +		};
> +
> +		spi1: spi@fff01000 {
> +			compatible = "snps,dw-apb-ssi";
> +			#address-cells = <1>;
> +			#size-cells = <0>;
> +			reg = <0xfff01000 0x1000>;
> +			interrupts = <0 156 4>;
> +			num-cs = <4>;
> +			clocks = <&spi_m_clk>;
> +			status = "disabled";
> +		};
> +
>  		/* Local timer */
>  		timer@fffec600 {
>  			compatible = "arm,cortex-a9-twd-timer";
> -- 
> 1.7.9.5

Applied to git.rocketboards.org/linux-socfpga-next.git next-dt.

BR,
Dinh
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