From: Jisheng Zhang <jszhang@kernel.org>
To: PaulCercueil <paul.cercueil@bootlin.com>,
robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org
Cc: Mark Brown <broonie@kernel.org>,
linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org,
Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
Bharat Bhushan <bbhushan2@marvell.com>,
Sunil Kovvuri Goutham <sgoutham@marvell.com>,
Tanmay Jagdale <tanmay@marvell.com>,
George Cherian <gcherian@marvell.com>
Subject: Re: [PATCH v3 6/6] spi: cadence-xspi: Add workaround for old Marvell firmwares
Date: Sun, 15 Nov 2026 21:10:23 +0800 [thread overview]
Message-ID: <avmvP5EQqMV_FKqI@xhacker> (raw)
In-Reply-To: <20261112143050.53347-7-paul.cercueil@bootlin.com>
On Thu, Nov 12, 2026 at 03:30:50PM +0100, Paul Cercueil wrote:
> From: Tanmay Jagdale <tanmay@marvell.com>
>
> Older firmwares from Marvell used the cdns,xspi-nor compatible string
> for the Marvell-specific xSPI IP, which is incompatible.
>
> Add a workaround to support this case, checking for a Marvell board in
> the DTB or the ACPI tables.
+ DT maintainers,
I want to query a rule here: does mainlined driver need to care
about out-of-tree dtb bug?
>
> Signed-off-by: Tanmay Jagdale <tanmay@marvell.com>
> Co-developed-by: Paul Cercueil <paul.cercueil@bootlin.com>
> Signed-off-by: Paul Cercueil <paul.cercueil@bootlin.com>
>
> ---
>
> v2: Replace the workaround based on the presence of the "xfer" resource
> with a mechanism that identifies a Marvell SoC based on the board's
> compatible string on DTB, and the DSDT table on ACPI.
>
> v3: Wrap ACPI specific code with CONFIG_ACPI guards, as some of the
> functions and structs aren't defined without CONFIG_ACPI.
> ---
> drivers/spi/spi-cadence-xspi.c | 41 +++++++++++++++++++++++++++++++++-
> 1 file changed, 40 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/spi-cadence-xspi.c b/drivers/spi/spi-cadence-xspi.c
> index 8fa58a0412e3..7b06b95af794 100644
> --- a/drivers/spi/spi-cadence-xspi.c
> +++ b/drivers/spi/spi-cadence-xspi.c
> @@ -2,6 +2,7 @@
> // Cadence XSPI flash controller driver
> // Copyright (C) 2020-21 Cadence
>
> +#include <linux/acpi.h>
> #include <linux/completion.h>
> #include <linux/delay.h>
> #include <linux/err.h>
> @@ -11,11 +12,13 @@
> #include <linux/iopoll.h>
> #include <linux/kernel.h>
> #include <linux/module.h>
> +#include <linux/of.h>
> #include <linux/platform_device.h>
> #include <linux/pm_runtime.h>
> #include <linux/property.h>
> #include <linux/spi/spi.h>
> #include <linux/spi/spi-mem.h>
> +#include <linux/string.h>
> #include <linux/bitfield.h>
> #include <linux/limits.h>
> #include <linux/log2.h>
> @@ -775,7 +778,6 @@ static void cdns_xspi_print_phy_config(struct cdns_xspi_dev *cdns_xspi)
> readl(cdns_xspi->auxbase + CDNS_XSPI_CCP_PHY_DLL_SLAVE_CTRL));
> }
>
> -#ifdef CONFIG_64BIT
> static struct cdns_xspi_driver_data marvell_driver_data = {
> .mrvl_hw_overlay = true,
> .dll_phy_ctrl = MARVELL_REGS_DLL_PHY_CTRL,
> @@ -788,6 +790,7 @@ static struct cdns_xspi_driver_data marvell_driver_data = {
> .rfile_phy_dll_slave_ctrl = MARVELL_RFILE_PHY_DLL_SLAVE_CTRL,
> };
>
> +#ifdef CONFIG_64BIT
> static const int cdns_mrvl_xspi_clk_div_list[] = {
> 4, //0x0 = Divide by 4. SPI clock is 200 MHz.
> 6, //0x1 = Divide by 6. SPI clock is 133.33 MHz.
> @@ -1228,6 +1231,33 @@ static int cdns_xspi_transfer_one_message_b0(struct spi_controller *controller,
> }
> #endif
>
> +#ifdef CONFIG_ACPI
> +static const struct acpi_platform_list mrvl_platform_list[] = {
> + {
> + .oem_id = "MRVL ",
> + .oem_table_id = "CN10K",
> + .table = ACPI_SIG_DSDT,
> + .pred = all_versions,
> + },
> + { }
> +};
> +#endif
> +
> +static inline bool cdns_is_marvell(struct device *dev)
> +{
> + const char *compatible;
> +
> +#ifdef CONFIG_ACPI
> + if (has_acpi_companion(dev))
> + return acpi_match_platform_list(mrvl_platform_list) >= 0;
> +#endif
> +
> + if (of_machine_read_compatible(&compatible, 0) < 0)
> + return false; /* shouldn't actually happen */
> +
> + return strstarts(compatible, "marvell,");
> +}
> +
> static int cdns_xspi_probe(struct platform_device *pdev)
> {
> struct device *dev = &pdev->dev;
> @@ -1249,6 +1279,15 @@ static int cdns_xspi_probe(struct platform_device *pdev)
> if (!cdns_xspi->driver_data)
> return -ENODEV;
>
> + if (IS_ENABLED(CONFIG_64BIT) &&
> + !cdns_xspi->driver_data->mrvl_hw_overlay &&
> + cdns_is_marvell(dev)) {
> + /* Some old firmwares use the base compatible string... */
> +
> + dev_warn(dev, "Using the cdns,xspi-nor compatible string on a Marvell SoC. Please fix firmware!\n");
> + cdns_xspi->driver_data = &marvell_driver_data;
> + }
> +
> host->mem_ops = &cadence_xspi_mem_ops;
> cdns_xspi->sdma_handler = &cdns_xspi_sdma_handle;
> cdns_xspi->set_interrupts_handler = &cdns_xspi_set_interrupts;
> --
> 2.47.3
>
prev parent reply other threads:[~2026-11-15 13:30 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-11-12 14:30 [PATCH v3 0/6] spi: cadence-xspi: Fixes and ACPI changes Paul Cercueil
2026-11-12 14:30 ` [PATCH v3 1/6] spi: cadence-xspi: Properly handle errors in .transfer_one_message Paul Cercueil
2026-11-12 14:30 ` [PATCH v3 2/6] spi: cadence-xspi: Reconfigure to STIG mode before SPI message Paul Cercueil
2026-11-12 14:30 ` [PATCH v3 3/6] spi: cadence-xspi: Inform SPI core about size transferred Paul Cercueil
2026-11-12 14:30 ` [PATCH v3 4/6] spi: cadence-xspi: Drop useless cdns_xspi->cur_cs Paul Cercueil
2026-11-12 14:30 ` [PATCH v3 5/6] spi: cadence-xspi: Rework resource discovery Paul Cercueil
2026-11-12 14:30 ` [PATCH v3 6/6] spi: cadence-xspi: Add workaround for old Marvell firmwares Paul Cercueil
2026-11-15 13:10 ` Jisheng Zhang [this message]
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