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From: <Claudiu.Beznea@microchip.com>
To: <Sergiu.Moga@microchip.com>, <lee@kernel.org>,
	<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
	<Nicolas.Ferre@microchip.com>, <alexandre.belloni@bootlin.com>,
	<radu_nicolae.pirea@upb.ro>, <richard.genoud@gmail.com>,
	<mturquette@baylibre.com>, <sboyd@kernel.org>,
	<gregkh@linuxfoundation.org>, <jirislaby@kernel.org>,
	<admin@hifiphile.com>, <Kavyasree.Kotagiri@microchip.com>
Cc: <devicetree@vger.kernel.org>,
	<linux-arm-kernel@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <linux-spi@vger.kernel.org>,
	<linux-clk@vger.kernel.org>, <linux-serial@vger.kernel.org>
Subject: Re: [PATCH 5/5] tty: serial: atmel: Make the driver aware of the existence of GCLK
Date: Wed, 31 Aug 2022 09:46:21 +0000	[thread overview]
Message-ID: <b29233a6-88f8-42cd-806f-6b3e82cb0b27@microchip.com> (raw)
In-Reply-To: <20220817075517.49575-6-sergiu.moga@microchip.com>

On 17.08.2022 10:55, Sergiu Moga wrote:
> Previously, the atmel serial driver did not take into account the
> possibility of using the more customizable generic clock as its
> baudrate generator. Unless there is a Fractional Part available to
> increase accuracy, there is a high chance that we may be able to
> generate a baudrate closer to the desired one by using the GCLK as the
> clock source. Now, depending on the error rate between
> the desired baudrate and the actual baudrate, the serial driver will
> fallback on the generic clock. The generic clock must be provided
> in the DT node of the serial that may need a more flexible clock source.
> 
> Signed-off-by: Sergiu Moga <sergiu.moga@microchip.com>
> ---
>  drivers/tty/serial/atmel_serial.c | 52 ++++++++++++++++++++++++++++++-
>  drivers/tty/serial/atmel_serial.h |  1 +
>  2 files changed, 52 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
> index 30ba9eef7b39..0a0b46ee0955 100644
> --- a/drivers/tty/serial/atmel_serial.c
> +++ b/drivers/tty/serial/atmel_serial.c
> @@ -15,6 +15,7 @@
>  #include <linux/init.h>
>  #include <linux/serial.h>
>  #include <linux/clk.h>
> +#include <linux/clk-provider.h>
>  #include <linux/console.h>
>  #include <linux/sysrq.h>
>  #include <linux/tty_flip.h>
> @@ -77,6 +78,8 @@ static void atmel_stop_rx(struct uart_port *port);
>  #endif
>  
>  #define ATMEL_ISR_PASS_LIMIT	256
> +#define ERROR_RATE(desired_value, actual_value) \
> +	((int)(100 - ((desired_value) * 100) / (actual_value)))
>  
>  struct atmel_dma_buffer {
>  	unsigned char	*buf;
> @@ -110,6 +113,7 @@ struct atmel_uart_char {
>  struct atmel_uart_port {
>  	struct uart_port	uart;		/* uart */
>  	struct clk		*clk;		/* uart clock */
> +	struct clk		*gclk;		/* uart generic clock */
>  	int			may_wakeup;	/* cached value of device_may_wakeup for times we need to disable it */
>  	u32			backup_imr;	/* IMR saved during suspend */
>  	int			break_active;	/* break being received */
> @@ -2115,6 +2119,8 @@ static void atmel_serial_pm(struct uart_port *port, unsigned int state,
>  		 * This is called on uart_close() or a suspend event.
>  		 */
>  		clk_disable_unprepare(atmel_port->clk);
> +		if (atmel_port->gclk && __clk_is_enabled(atmel_port->gclk))

No need to check for atmel_port->gclk != NULL. clk APIs are already doing this.

> +			clk_disable_unprepare(atmel_port->gclk);
>  		break;
>  	default:
>  		dev_err(port->dev, "atmel_serial: unknown pm %d\n", state);
> @@ -2129,7 +2135,8 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
>  {
>  	struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
>  	unsigned long flags;
> -	unsigned int old_mode, mode, imr, quot, baud, div, cd, fp = 0;
> +	unsigned int old_mode, mode, imr, quot, div, cd, fp = 0;
> +	unsigned int baud, actual_baud, gclk_rate;
>  
>  	/* save the current mode register */
>  	mode = old_mode = atmel_uart_readl(port, ATMEL_US_MR);
> @@ -2288,6 +2295,37 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
>  		cd /= 8;
>  		mode |= ATMEL_US_USCLKS_MCK_DIV8;
>  	}
> +
> +	/*
> +	 * If there is no Fractional Part, there is a high chance that
> +	 * we may be able to generate a baudrate closer to the desired one
> +	 * if we use the GCLK as the clock source driving the baudrate
> +	 * generator.
> +	 */
> +	if (!fp && atmel_port->gclk) {
> +		if (__clk_is_enabled(atmel_port->gclk))
> +			clk_disable_unprepare(atmel_port->gclk);

You disabled it here, set new rate but re-enable it conditionally above, is
this intended? the below condition may fail.

> +		clk_set_rate(atmel_port->gclk, 16 * baud);
> +		gclk_rate = clk_get_rate(atmel_port->gclk);

You should be able to use clk_round_rate() here:
		gclk_rate = clk_round_rate(atmel_port->gclk,
					   16 * baudrate);

With this you can re-write all this block something like:

		gclk_rate = clk_round_rate(atmel_port->gclk,
					   16 * baudrate);
		actual_baud = gclk_rate / (16 * cd);
		if (abs(ERROR_RATE(baud, actual_baud)) >
		    abd(ERROR_RATE(baud, gclk_rate / 16))) {
			mode |= ATMEL_US_GCLK;
			cd = 1;
			if (__clk_is_enabled(atmel_port->gclk))
				clk_disable_unprepare(atmel_port->gclk)
			clk_set_rate(atmel_port->gclk, gclk_rate);
			clk_prepare_enable(atmel_port->gclk);
		}


> +		actual_baud = clk_get_rate(atmel_port->clk) / (16 * cd);
> +		if (abs(ERROR_RATE(baud, actual_baud)) >
> +		    abs(ERROR_RATE(baud, gclk_rate / 16))) {
> +			mode |= ATMEL_US_GCLK;
> +
> +			/*
> +			 * Set the Clock Divisor for GCLK to 1.
> +			 * Since we were able to generate the smallest
> +			 * multiple of the desired baudrate times 16,
> +			 * then we surely can generate a bigger multiple
> +			 * with the exact error rate for an equally increased
> +			 * CD. Thus no need to take into account
> +			 * a higher value for CD.
> +			 */
> +			cd = 1;
> +			clk_prepare_enable(atmel_port->gclk);
> +		}
> +	}
> +
>  	quot = cd | fp << ATMEL_US_FP_OFFSET;
>  
>  	if (!(port->iso7816.flags & SER_ISO7816_ENABLED))
> @@ -2883,6 +2921,16 @@ static int atmel_serial_probe(struct platform_device *pdev)
>  	if (ret)
>  		goto err;
>  
> +	atmel_port->gclk = devm_clk_get_optional(&pdev->dev, "gclk");
> +	if (atmel_port->gclk) {
> +		ret = clk_prepare_enable(atmel_port->gclk);
> +		if (ret) {
> +			atmel_port->gclk = NULL;
> +			return ret;
> +		}
> +		clk_disable_unprepare(atmel_port->gclk);

Is there a reason you enable then disable the clock here?

> +	}
> +
>  	ret = atmel_init_port(atmel_port, pdev);
>  	if (ret)
>  		goto err_clk_disable_unprepare;
> @@ -2929,6 +2977,8 @@ static int atmel_serial_probe(struct platform_device *pdev)
>  	 * is used
>  	 */
>  	clk_disable_unprepare(atmel_port->clk);
> +	if (atmel_port->gclk && __clk_is_enabled(atmel_port->gclk))
> +		clk_disable_unprepare(atmel_port->gclk);

Is this due to the enable in atmel_set_termios()? Is that called on probe
path? Also, there is no need to check for atmel_port->gclk as clk APIs are
already doing this.

>  
>  	return 0;
>  
> diff --git a/drivers/tty/serial/atmel_serial.h b/drivers/tty/serial/atmel_serial.h
> index 0d8a0f9cc5c3..fb718972f81a 100644
> --- a/drivers/tty/serial/atmel_serial.h
> +++ b/drivers/tty/serial/atmel_serial.h
> @@ -63,6 +63,7 @@
>  #define		ATMEL_US_PAR_MARK		(3 <<  9)
>  #define		ATMEL_US_PAR_NONE		(4 <<  9)
>  #define		ATMEL_US_PAR_MULTI_DROP		(6 <<  9)
> +#define ATMEL_US_GCLK                          BIT(12)

It seems there are spaces here.

>  #define	ATMEL_US_NBSTOP		GENMASK(13, 12)	/* Number of Stop Bits */
>  #define		ATMEL_US_NBSTOP_1		(0 << 12)
>  #define		ATMEL_US_NBSTOP_1_5		(1 << 12)


  parent reply	other threads:[~2022-08-31  9:46 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-17  7:55 [PATCH 0/5] Make atmel serial driver aware of GCLK Sergiu Moga
2022-08-17  7:55 ` [PATCH 1/5] dt-bindings: mfd: atmel,sama5d2-flexcom: Add SPI child node ref binding Sergiu Moga
2022-08-18  8:31   ` Krzysztof Kozlowski
2022-08-17  7:55 ` [PATCH 2/5] dt-bindings: mfd: atmel,at91-usart: convert to json-schema Sergiu Moga
2022-08-18  8:38   ` Krzysztof Kozlowski
2022-08-19  8:37     ` Sergiu.Moga
2022-08-19  8:41       ` Krzysztof Kozlowski
2022-08-19  9:25     ` Sergiu.Moga
2022-08-19 12:06       ` Krzysztof Kozlowski
2022-08-18  8:39   ` Krzysztof Kozlowski
2022-08-19  8:38     ` Sergiu.Moga
2022-08-19  8:47       ` Krzysztof Kozlowski
2022-08-19  9:05         ` Krzysztof Kozlowski
2022-09-01 11:31           ` Eugen.Hristev
2022-09-05 10:10             ` Krzysztof Kozlowski
2022-09-05 14:37       ` Lee Jones
2022-09-05 15:22         ` Sergiu.Moga
2022-09-05 16:12           ` Krzysztof Kozlowski
2022-09-06 15:49             ` Lee Jones
2022-08-17  7:55 ` [PATCH 3/5] dt-bindings: mfd: atmel,sama5d2-flexcom: Add USART child node ref binding Sergiu Moga
2022-08-17  7:55 ` [PATCH 4/5] clk: at91: sama5d2: Add Generic Clocks for UART/USART Sergiu Moga
2022-08-26  7:03   ` Claudiu.Beznea
2022-08-30 22:23   ` Stephen Boyd
2022-08-31 14:47     ` Claudiu.Beznea
2022-08-17  7:55 ` [PATCH 5/5] tty: serial: atmel: Make the driver aware of the existence of GCLK Sergiu Moga
2022-08-30 17:29   ` Richard Genoud
2022-08-31  8:49     ` Sergiu.Moga
2022-08-31  9:46   ` Claudiu.Beznea [this message]
2022-08-31 11:32     ` Sergiu.Moga
2022-09-01  6:36       ` Claudiu.Beznea

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