From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
To: Geert Uytterhoeven <geert@linux-m68k.org>
Cc: Mason Yang <masonccyang@mxic.com.tw>,
Mark Brown <broonie@kernel.org>,
Marek Vasut <marek.vasut@gmail.com>,
Linux Kernel Mailing List <linux-kernel@vger.kernel.org>,
linux-spi <linux-spi@vger.kernel.org>,
Boris Brezillon <bbrezillon@kernel.org>,
Linux-Renesas <linux-renesas-soc@vger.kernel.org>,
Geert Uytterhoeven <geert+renesas@glider.be>,
juliensu@mxic.com.tw, Simon Horman <horms@verge.net.au>,
zhengxunli@mxic.com.tw
Subject: Re: [PATCH v8 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver
Date: Fri, 8 Mar 2019 20:32:31 +0300 [thread overview]
Message-ID: <b469bffe-b5b2-0b03-b6fb-49bfc8ba74ab@cogentembedded.com> (raw)
In-Reply-To: <CAMuHMdVjgWNw4fnzJV=Qxs6zyNiBPubJUL-4WDOy26N4TkQ4gQ@mail.gmail.com>
Hello!
On 03/08/2019 12:14 PM, Geert Uytterhoeven wrote:
>>> Add a driver for Renesas R-Car Gen3 RPC-IF SPI controller.
>>>
>>> Signed-off-by: Mason Yang <masonccyang@mxic.com.tw>
>>> Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
>> [...]
>>> diff --git a/drivers/spi/spi-renesas-rpc.c b/drivers/spi/spi-renesas-rpc.c
>>> new file mode 100644
>>> index 0000000..ea12017
>>> --- /dev/null
>>> +++ b/drivers/spi/spi-renesas-rpc.c
>>> @@ -0,0 +1,804 @@
>> [...]
>>> +static void rpc_spi_hw_init(struct rpc_spi *rpc)
>>> +{
>>> + //
>>> + // NOTE: The 0x260 are undocumented bits, but they must be set.
>>> + // RPC_PHYCNT_STRTIM is strobe timing adjustment bit,
>>> + // 0x0 : the delay is biggest,
>>> + // 0x1 : the delay is 2nd biggest,
>>> + // On H3 ES1.x, the value should be 0, while on others,
>>> + // the value should be 6.
>>> + //
>>> + regmap_write(rpc->regmap, RPC_PHYCNT, RPC_PHYCNT_CAL |
>>> + RPC_PHYCNT_STRTIM(6) | 0x260);
>>> +
>>> + //
>>> + // NOTE: The 0x1511144 are undocumented bits, but they must be set
>>> + // for RPC_PHYOFFSET1.
>>> + // The 0x31 are undocumented bits, but they must be set
>>> + // for RPC_PHYOFFSET2.
>>> + //
>>> + regmap_write(rpc->regmap, RPC_PHYOFFSET1, RPC_PHYOFFSET1_DDRTMG(3) |
>>> + 0x1511144);
>>> + regmap_write(rpc->regmap, RPC_PHYOFFSET2, 0x31 |
>>> + RPC_PHYOFFSET2_OCTTMG(4));
>>> + regmap_write(rpc->regmap, RPC_SSLDR, RPC_SSLDR_SPNDL(7) |
>>> + RPC_SSLDR_SLNDL(7) | RPC_SSLDR_SCKDL(7));
>>> + regmap_write(rpc->regmap, RPC_CMNCR, RPC_CMNCR_MD | RPC_CMNCR_SFDE |
>>> + RPC_CMNCR_MOIIO_HIZ | RPC_CMNCR_IOFV_HIZ |
>>> + RPC_CMNCR_BSZ(0));
>>> +}
>>
>> We clearly need runtime PM get/put() calls around this code. Otherwise,
>> we're dependant on U-Boot leaving the clocks enabled...
>
> Even that would be futile, as the common clock framework disables all
> unused clocks at late boot time.
This code is executed during the probing time and it indeed works. The clocks seem
to be disabled somewhat later...
> Gr{oetje,eeting}s,
>
> Geert
MBR, Sergei
next prev parent reply other threads:[~2019-03-08 17:32 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-28 6:49 [PATCH v8 0/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI driver Mason Yang
2019-01-28 6:49 ` [PATCH v8 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver Mason Yang
2019-02-12 14:22 ` Applied "spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver" to the spi tree Mark Brown
2019-02-12 14:33 ` Marek Vasut
2019-02-12 14:43 ` Mark Brown
2019-02-12 16:49 ` Mark Brown
[not found] ` <OF9C8DA179.15D69C0A-ON482583A0.00283EB5-482583A0.002E45C8@mxic.com.tw>
2019-02-13 12:16 ` Mark Brown
2019-02-13 12:37 ` Marek Vasut
[not found] ` <OF9B3A3A20.C0BF34B8-ON482583A1.002D5F3B-482583A1.00329653@mxic.com.tw>
2019-02-14 10:52 ` Marek Vasut
2019-03-07 17:50 ` [PATCH v8 1/2] spi: Add Renesas R-Car Gen3 RPC-IF SPI controller driver Sergei Shtylyov
2019-03-08 9:14 ` Geert Uytterhoeven
2019-03-08 17:32 ` Sergei Shtylyov [this message]
2019-03-22 17:43 ` Sergei Shtylyov
[not found] ` <OF7C1EB3FC.1ABCD2C2-ON482583C8.002D7A69-482583C8.002E899C@mxic.com.tw>
2019-03-25 19:12 ` Sergei Shtylyov
2019-03-26 16:42 ` Sergei Shtylyov
[not found] ` <OF5BDFBDAB.B66A1ADE-ON482583CA.0006C5C2-482583CA.0008788E@mxic.com.tw>
2019-03-27 10:20 ` Sergei Shtylyov
2019-01-28 6:49 ` [PATCH v8 2/2] dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings Mason Yang
2019-02-12 14:22 ` Applied "dt-bindings: spi: Document Renesas R-Car Gen3 RPC-IF controller bindings" to the spi tree Mark Brown
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=b469bffe-b5b2-0b03-b6fb-49bfc8ba74ab@cogentembedded.com \
--to=sergei.shtylyov@cogentembedded.com \
--cc=bbrezillon@kernel.org \
--cc=broonie@kernel.org \
--cc=geert+renesas@glider.be \
--cc=geert@linux-m68k.org \
--cc=horms@verge.net.au \
--cc=juliensu@mxic.com.tw \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-renesas-soc@vger.kernel.org \
--cc=linux-spi@vger.kernel.org \
--cc=marek.vasut@gmail.com \
--cc=masonccyang@mxic.com.tw \
--cc=zhengxunli@mxic.com.tw \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).