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From: William Qiu <william.qiu@starfivetech.com>
To: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
	<devicetree@vger.kernel.org>, <linux-spi@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <linux-riscv@lists.infradead.org>
Cc: Mark Brown <broonie@kernel.org>, Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Conor Dooley <conor+dt@kernel.org>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Linus Walleij <linus.walleij@linaro.org>
Subject: Re: [RESEND v1 1/2] dt-binding: spi: constrain minItems of clocks and clock-names
Date: Wed, 5 Jul 2023 11:37:40 +0800	[thread overview]
Message-ID: <c5027d42-b9be-090d-bd43-86c9b1448c99@starfivetech.com> (raw)
In-Reply-To: <1b65e8d1-d5e1-0d6b-1248-d9683be44db8@linaro.org>



On 2023/7/4 17:38, Krzysztof Kozlowski wrote:
> On 04/07/2023 11:21, William Qiu wrote:
>> The SPI controller only need apb_pclk clock to work properly on JH7110 SoC,
>> so there add minItems whose value is equal to 1. Other platforms do not
>> have this constraint.
>> 
>> Signed-off-by: William Qiu <william.qiu@starfivetech.com>
> 
> I don't get why this is resent, but subject prefix is still wrong. It's
> dt-bindings.
> 
Will update.
>> ---
>>  Documentation/devicetree/bindings/spi/spi-pl022.yaml | 11 ++++++++---
>>  1 file changed, 8 insertions(+), 3 deletions(-)
>> 
>> diff --git a/Documentation/devicetree/bindings/spi/spi-pl022.yaml b/Documentation/devicetree/bindings/spi/spi-pl022.yaml
>> index 91e540a92faf..42bb34c39971 100644
>> --- a/Documentation/devicetree/bindings/spi/spi-pl022.yaml
>> +++ b/Documentation/devicetree/bindings/spi/spi-pl022.yaml
>> @@ -11,6 +11,7 @@ maintainers:
>> 
>>  allOf:
>>    - $ref: spi-controller.yaml#
>> +  - $ref: /schemas/arm/primecell.yaml#
> 
> This looks unrelated, so keep it as separate commit with its own rationale.
> 
Because "arm,primecell-periphid"  is need in JH7110 SoC, so I added them in
one commit, so do I need to put them in two commit?
>> 
>>  # We need a select here so we don't match all nodes with 'arm,primecell'
>>  select:
>> @@ -34,12 +35,16 @@ properties:
>>      maxItems: 1
>> 
>>    clocks:
>> +    minItems: 1
>>      maxItems: 2
>> 
>>    clock-names:
>> -    items:
>> -      - const: sspclk
>> -      - const: apb_pclk
>> +    oneOf:
>> +      - items:
>> +          - const: apb_pclk
>> +      - items:
>> +          - const: sspclk
>> +          - const: apb_pclk
> 
> Are you sure that your clock is APB pclk in such case?
> 
Yes, in JH7110 SoC is APB pclk in such case.

Thanks for taking time to review this patch series.
> Best regards,
> Krzysztof
> 

  reply	other threads:[~2023-07-05  3:37 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-04  9:21 [RESEND v1 0/2] Add SPI module for StarFive JH7110 SoC William Qiu
2023-07-04  9:21 ` [RESEND v1 1/2] dt-binding: spi: constrain minItems of clocks and clock-names William Qiu
2023-07-04  9:38   ` Krzysztof Kozlowski
2023-07-05  3:37     ` William Qiu [this message]
2023-07-05  6:00       ` Krzysztof Kozlowski
2023-07-05  6:20         ` William Qiu
2023-07-04  9:22 ` [RESEND v1 2/2] riscv: dts: starfive: Add spi node for JH7110 SoC William Qiu
2023-07-04  9:39   ` Krzysztof Kozlowski
2023-07-04 12:26     ` Mark Brown
2023-07-04 12:27       ` Krzysztof Kozlowski
2023-07-04 13:16         ` Mark Brown
2023-07-04 13:21           ` Krzysztof Kozlowski
2023-07-04 14:13             ` Mark Brown
2023-07-04 16:41               ` Conor Dooley
2023-07-05  3:40     ` William Qiu

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