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Mon, 28 Sep 2026 01:59:21 -0700 (PDT) X-Received: by 2002:a17:90b:4a41:b0:3a0:ea63:13f4 with SMTP id 98e67ed59e1d1-3a0ea631b3bmr4076080a91.38.1790585960815; Mon, 28 Sep 2026 01:59:20 -0700 (PDT) Received: from [10.218.14.97] ([202.46.22.19]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-3a0e151be04sm13302899a91.9.2026.09.28.01.59.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 28 Sep 2026 01:59:20 -0700 (PDT) Message-ID: Date: Mon, 28 Sep 2026 14:29:12 +0530 Precedence: bulk X-Mailing-List: linux-spi@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 0/9] soc: qcom: geni: Derive SE clock configuration from OPP table on SA8255P To: Konrad Dybcio , Ulf Hansson , Mukesh Kumar Savaliya Cc: Sudeep Holla , Cristian Marussi , Ulf Hansson , Bjorn Andersson , Konrad Dybcio , Greg Kroah-Hartman , Jiri Slaby , Mark Brown , Viken Dadhaniya , Andi Shyti , chandana.chiluveru@oss.qualcomm.com, arm-scmi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-serial@vger.kernel.org, linux-spi@vger.kernel.org, linux-i2c@vger.kernel.org, Abel Vesa References: <20260827-derive_clk_perf_tbl_from_perf_domain_opp_table-v2-0-091697dbeb02@oss.qualcomm.com> <177884a8-902f-49be-8fcb-b2bec3ec7d6c@oss.qualcomm.com> <0f5494c7-c3c1-4668-a09f-d8c43d1c58b9@oss.qualcomm.com> <6c28e672-349c-49cb-892d-ec521b3004bf@oss.qualcomm.com> Content-Language: en-US From: Praveen Talari In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Proofpoint-ORIG-GUID: ioqSpy1NIp6mgSiPYHAJqdXqhWpjEZDm X-Proofpoint-GUID: ioqSpy1NIp6mgSiPYHAJqdXqhWpjEZDm X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTI4MDAzNSBTYWx0ZWRfXw2xAHJdBBp8k TSQJCOXLnfIdiPv4c4DrnNOdL3/u3gWL8dAKuWcvvPGh6KYsO9BSOkxICmWnwqGKwWppILi0aYq LzjylA9MpCvl1fxgV57L5+2ofQSWA3VBdh/a6wEn5enA0Lc2yPdI1I7CT7P5I3L+atAM7hX4Se2 owHN8eNDMR90UqTS57Sj1nT8D1Qnm0NOp1KFCQyW8Y5p22158UoL+UyGNCfzGElgMEkvRAfTX1+ Al/zQpHtpEckEEmEn3YcsFpZ8THqOVVJMOsllkwnVanrwo78DCpMlNATix/v5+xf1QqjtytW0An qNRKaFTDxTlApzLPVnZLdStCIFnGTCT7htJ6lCN7Lw+XmqbLqG71grZFXvVMQ887xyzwUt6XDvy hnDwwSEHfQO7Ve37lPl8l16MA8PXaMA5ah0zOT0mSWBgn48XxPHDu9ybf0yuC6+cgsF9+BfuAU9 4/hR0rWbxg9DZz0oSwA== X-Proofpoint-Spam-Info: AW1haW4tMjYwOTI4MDAzNSBTYWx0ZWRfXz1XO7iiwOv3n 1H2hWZtfvmgjlzO8RnMxfbkFR0jM+3tSRlcr4Yd3+E4YjKKDhFCdkgBo33QAlAyQXDZKlqUpKWH i/YvmUa47BenXxuimWwu9b4WXerZztg= X-Authority-Analysis: v=2.4 cv=asYnmiZV c=1 sm=1 tr=0 ts=6aba2c6a cx=c_pps a=vVfyC5vLCtgYJKYeQD43oA==:117 a=fChuTYTh2wq5r3m49p7fHw==:17 a=IkcTkHD0fZMA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=EUspDBNiAAAA:8 a=AjVmRg8o_XJH9waDQPAA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=rl5im9kqc5Lf4LNbBjHf:22 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-28_01,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 phishscore=0 suspectscore=0 priorityscore=1501 impostorscore=0 lowpriorityscore=0 clxscore=1015 adultscore=0 bulkscore=0 malwarescore=0 spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609280035 Hi Konrad, On 22-09-2026 18:36, Konrad Dybcio wrote: > On 9/11/26 7:33 PM, Praveen Talari wrote: >> Hi Konrad, >> >> On 04-09-2026 14:30, Konrad Dybcio wrote: >>> On 9/4/26 9:56 AM, Ulf Hansson wrote: >>>> On Tue, Sep 1, 2026 at 6:48 PM Praveen Talari >>>> wrote: >>> [...] >>> >>>> So geni_se_clk_freq_match() is used by two consumer drivers today, >>>> drivers/spi/spi-geni-qcom.c and drivers/tty/serial/qcom_geni_serial.c. >>>> >>>> Beyond the $subject series, there will be even more consumer drivers >>>> that call these platform specific functions. As I said above, I don't >>>> think this is moving things in the right direction. >>>> >>>> If this can't be solved with generic frameworks (clocks and OPP), >>>> please clarify why so we can figure out a better way forward. >>> The way I read it, isn't geni_se_clk_freq_match() more or less >>> dev_pm_opp_find_freq_exact() called in a loop with an increasing >>> divider? >> Currently, geni_se_clk_freq_match() relies on clk_perf_tbl to >> determine the source clock index and divider corresponding to >> a requested frequency. > So I think the part that blocks going in the direction I > suggested is that the index and divider values you mentioned > are then required to be fed into some GENI-internal registers: > > -- drivers/spi/spi-geni-qcom.c > clk_sel = idx & CLK_SEL_MSK; > m_clk_cfg = (div << CLK_DIV_SHFT) | SER_CLK_EN; > writel(clk_sel, se->base + SE_GENI_CLK_SEL); > writel(m_clk_cfg, se->base + GENI_SER_M_CLK_CFG); > > and it seems like every protocol driver does some NIH things > to take care of that.. perhaps this bit could be moved up to > the common geni-se layer (Mukesh, are there some historical > reasons for this being handled in proto drivers?) Just to confirm, would you like the clock programming logic to be moved into the common GENI driver (geni-se.c)? If yes, I can take that up in a separate series. Thanks, Praveen Talari > > I think this may just be an effect of how the hardware is wired > up - the ""DFS"" clocks that feed into the serial engines are > partly set up in the clock controller driver, but then there's > this bit: > > -- drivers/clk/qcom/clk-rcg2.c > clk_rcg2_enable_dfs() > /* > * Rate changes with consumer writing a register in > * their own I/O region > */ > init->flags |= CLK_GET_RATE_NOCACHE; > init->ops = &clk_rcg2_dfs_ops; > > which is the writes i mentioned above. > > At a glance, plumbing this into OPP would require making GENI > SEs self-consumed clock providers, which sounds no less messy > > Konrad