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[83.9.31.150]) by smtp.gmail.com with ESMTPSA id 9-20020a05651c00c900b002aa3ad9014asm1943304ljr.54.2023.06.06.09.53.35 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 06 Jun 2023 09:53:36 -0700 (PDT) Message-ID: Date: Tue, 6 Jun 2023 18:53:35 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.2 Subject: Re: [PATCH v2 1/2] soc: qcom: geni-se: Add interfaces geni_se_tx_init_dma() and geni_se_rx_init_dma() Content-Language: en-US To: Vijaya Krishna Nivarthi , agross@kernel.org, andersson@kernel.org, broonie@kernel.org, dianders@chromium.org, linux-arm-msm@vger.kernel.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org Cc: quic_msavaliy@quicinc.com, mka@chromium.org, swboyd@chromium.org, quic_vtanuku@quicinc.com, quic_ptalari@quicinc.com References: <1684325894-30252-1-git-send-email-quic_vnivarth@quicinc.com> <1684325894-30252-2-git-send-email-quic_vnivarth@quicinc.com> From: Konrad Dybcio In-Reply-To: <1684325894-30252-2-git-send-email-quic_vnivarth@quicinc.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Precedence: bulk List-ID: X-Mailing-List: linux-spi@vger.kernel.org On 17.05.2023 14:18, Vijaya Krishna Nivarthi wrote: > The geni_se_xx_dma_prep() interfaces necessarily do DMA mapping before > initiating DMA transfers. This is not suitable for spi where framework > is expected to handle map/unmap. > > Expose new interfaces geni_se_xx_init_dma() which do only DMA transfer. > > Signed-off-by: Vijaya Krishna Nivarthi > --- Reviewed-by: Konrad Dybcio Konrad > v1 -> v2: > - interfaces to take dma address as argument instead of its pointer > --- > drivers/soc/qcom/qcom-geni-se.c | 67 +++++++++++++++++++++++++++++----------- > include/linux/soc/qcom/geni-se.h | 4 +++ > 2 files changed, 53 insertions(+), 18 deletions(-) > > diff --git a/drivers/soc/qcom/qcom-geni-se.c b/drivers/soc/qcom/qcom-geni-se.c > index 795a2e1..dd50a25 100644 > --- a/drivers/soc/qcom/qcom-geni-se.c > +++ b/drivers/soc/qcom/qcom-geni-se.c > @@ -682,6 +682,30 @@ EXPORT_SYMBOL(geni_se_clk_freq_match); > #define GENI_SE_DMA_EOT_EN BIT(1) > #define GENI_SE_DMA_AHB_ERR_EN BIT(2) > #define GENI_SE_DMA_EOT_BUF BIT(0) > + > +/** > + * geni_se_tx_init_dma() - Initiate TX DMA transfer on the serial engine > + * @se: Pointer to the concerned serial engine. > + * @iova: Mapped DMA address. > + * @len: Length of the TX buffer. > + * > + * This function is used to initiate DMA TX transfer. > + */ > +void geni_se_tx_init_dma(struct geni_se *se, dma_addr_t iova, size_t len) > +{ > + u32 val; > + > + val = GENI_SE_DMA_DONE_EN; > + val |= GENI_SE_DMA_EOT_EN; > + val |= GENI_SE_DMA_AHB_ERR_EN; > + writel_relaxed(val, se->base + SE_DMA_TX_IRQ_EN_SET); > + writel_relaxed(lower_32_bits(iova), se->base + SE_DMA_TX_PTR_L); > + writel_relaxed(upper_32_bits(iova), se->base + SE_DMA_TX_PTR_H); > + writel_relaxed(GENI_SE_DMA_EOT_BUF, se->base + SE_DMA_TX_ATTR); > + writel(len, se->base + SE_DMA_TX_LEN); > +} > +EXPORT_SYMBOL(geni_se_tx_init_dma); > + > /** > * geni_se_tx_dma_prep() - Prepare the serial engine for TX DMA transfer > * @se: Pointer to the concerned serial engine. > @@ -697,7 +721,6 @@ int geni_se_tx_dma_prep(struct geni_se *se, void *buf, size_t len, > dma_addr_t *iova) > { > struct geni_wrapper *wrapper = se->wrapper; > - u32 val; > > if (!wrapper) > return -EINVAL; > @@ -706,17 +729,34 @@ int geni_se_tx_dma_prep(struct geni_se *se, void *buf, size_t len, > if (dma_mapping_error(wrapper->dev, *iova)) > return -EIO; > > + geni_se_tx_init_dma(se, *iova, len); > + return 0; > +} > +EXPORT_SYMBOL(geni_se_tx_dma_prep); > + > +/** > + * geni_se_rx_init_dma() - Initiate RX DMA transfer on the serial engine > + * @se: Pointer to the concerned serial engine. > + * @iova: Mapped DMA address. > + * @len: Length of the RX buffer. > + * > + * This function is used to initiate DMA RX transfer. > + */ > +void geni_se_rx_init_dma(struct geni_se *se, dma_addr_t iova, size_t len) > +{ > + u32 val; > + > val = GENI_SE_DMA_DONE_EN; > val |= GENI_SE_DMA_EOT_EN; > val |= GENI_SE_DMA_AHB_ERR_EN; > - writel_relaxed(val, se->base + SE_DMA_TX_IRQ_EN_SET); > - writel_relaxed(lower_32_bits(*iova), se->base + SE_DMA_TX_PTR_L); > - writel_relaxed(upper_32_bits(*iova), se->base + SE_DMA_TX_PTR_H); > - writel_relaxed(GENI_SE_DMA_EOT_BUF, se->base + SE_DMA_TX_ATTR); > - writel(len, se->base + SE_DMA_TX_LEN); > - return 0; > + writel_relaxed(val, se->base + SE_DMA_RX_IRQ_EN_SET); > + writel_relaxed(lower_32_bits(iova), se->base + SE_DMA_RX_PTR_L); > + writel_relaxed(upper_32_bits(iova), se->base + SE_DMA_RX_PTR_H); > + /* RX does not have EOT buffer type bit. So just reset RX_ATTR */ > + writel_relaxed(0, se->base + SE_DMA_RX_ATTR); > + writel(len, se->base + SE_DMA_RX_LEN); > } > -EXPORT_SYMBOL(geni_se_tx_dma_prep); > +EXPORT_SYMBOL(geni_se_rx_init_dma); > > /** > * geni_se_rx_dma_prep() - Prepare the serial engine for RX DMA transfer > @@ -733,7 +773,6 @@ int geni_se_rx_dma_prep(struct geni_se *se, void *buf, size_t len, > dma_addr_t *iova) > { > struct geni_wrapper *wrapper = se->wrapper; > - u32 val; > > if (!wrapper) > return -EINVAL; > @@ -742,15 +781,7 @@ int geni_se_rx_dma_prep(struct geni_se *se, void *buf, size_t len, > if (dma_mapping_error(wrapper->dev, *iova)) > return -EIO; > > - val = GENI_SE_DMA_DONE_EN; > - val |= GENI_SE_DMA_EOT_EN; > - val |= GENI_SE_DMA_AHB_ERR_EN; > - writel_relaxed(val, se->base + SE_DMA_RX_IRQ_EN_SET); > - writel_relaxed(lower_32_bits(*iova), se->base + SE_DMA_RX_PTR_L); > - writel_relaxed(upper_32_bits(*iova), se->base + SE_DMA_RX_PTR_H); > - /* RX does not have EOT buffer type bit. So just reset RX_ATTR */ > - writel_relaxed(0, se->base + SE_DMA_RX_ATTR); > - writel(len, se->base + SE_DMA_RX_LEN); > + geni_se_rx_init_dma(se, *iova, len); > return 0; > } > EXPORT_SYMBOL(geni_se_rx_dma_prep); > diff --git a/include/linux/soc/qcom/geni-se.h b/include/linux/soc/qcom/geni-se.h > index c55a0bc..821a191 100644 > --- a/include/linux/soc/qcom/geni-se.h > +++ b/include/linux/soc/qcom/geni-se.h > @@ -490,9 +490,13 @@ int geni_se_clk_freq_match(struct geni_se *se, unsigned long req_freq, > unsigned int *index, unsigned long *res_freq, > bool exact); > > +void geni_se_tx_init_dma(struct geni_se *se, dma_addr_t iova, size_t len); > + > int geni_se_tx_dma_prep(struct geni_se *se, void *buf, size_t len, > dma_addr_t *iova); > > +void geni_se_rx_init_dma(struct geni_se *se, dma_addr_t iova, size_t len); > + > int geni_se_rx_dma_prep(struct geni_se *se, void *buf, size_t len, > dma_addr_t *iova); >