From mboxrd@z Thu Jan  1 00:00:00 1970
From: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Subject: Re: [PATCH] of: added documentation for spi chipselects
Date: Tue, 16 Feb 2010 12:00:12 -0700
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On Tue, Feb 16, 2010 at 11:39 AM, Ernst Schwab <eschwab-BGeptl67XyCzQB+pC5nmwQ@public.gmane.org> wrote:
> From: Ernst Schwab <eschwab-BGeptl67XyCzQB+pC5nmwQ@public.gmane.org>
>
> Added devicetree binding documentation for gpios used as chipselect. The
> code to evaluate these is already present in spi_mpc8xxx.c.
>
> Signed-off-by: Ernst Schwab <eschwab-BGeptl67XyCzQB+pC5nmwQ@public.gmane.org>

Merged, thanks.


> ---
> diff -upr a/Documentation/powerpc/dts-bindings/fsl/spi.txt b/Documentatio=
n/powerpc/dts-bindings/fsl/spi.txt
> --- a/Documentation/powerpc/dts-bindings/fsl/spi.txt
> +++ b/Documentation/powerpc/dts-bindings/fsl/spi.txt
> @@ -13,6 +13,11 @@ Required properties:
> =A0- interrupt-parent : the phandle for the interrupt controller that
> =A0 services interrupts for this device.
>
> +Optional properties:
> +- gpios : specifies the gpio pins to be used for chipselects.
> + =A0The gpios will be referred to as reg=3D<index> in the SPI child node=
s.
> + =A0If unspecified, a single SPI device without a chip select can be use=
d.
> +
> =A0Example:
> =A0 =A0 =A0 =A0spi@4c0 {
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0cell-index =3D <0>;
> @@ -21,4 +26,6 @@ Example:
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupts =3D <82 0>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0interrupt-parent =3D <700>;
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0mode =3D "cpu";
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 gpios =3D <&gpio 18 1 =A0 =A0 // device reg=
=3D<0>, low-active
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0&gpio 19 1>; =A0 // devi=
ce reg=3D<1>, low-active
> =A0 =A0 =A0 =A0};
>
>
>



-- =

Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.