From mboxrd@z Thu Jan 1 00:00:00 1970 From: Martin Guy Subject: Re: [PATCH v4 1/2] spi: implemented driver for Cirrus EP93xx SPI controller Date: Thu, 22 Apr 2010 15:28:27 +0100 Message-ID: References: <0D753D10438DA54287A00B0270842697636D7F4E7F@AUSP01VMBX24.collaborationhost.net> <20100421071629.GL19534@gw.healthdatacare.com> <0D753D10438DA54287A00B0270842697636D8C84DA@AUSP01VMBX24.collaborationhost.net> <20100421165420.GP19534@gw.healthdatacare.com> <0D753D10438DA54287A00B0270842697636D8C8CDD@AUSP01VMBX24.collaborationhost.net> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Cc: "spi-devel-general-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org" , Mika Westerberg , "ryan-7Wk5F4Od5/oYd5yxfr4S2w@public.gmane.org" , "linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org" To: H Hartley Sweeten Return-path: In-Reply-To: <0D753D10438DA54287A00B0270842697636D8C8CDD-gaq956PjLg32KbjnnMDalRurcAul1UnsRrxOEX5GOmysTnJN9+BGXg@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: spi-devel-general-bounces-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org List-Id: linux-spi.vger.kernel.org On 4/22/10, H Hartley Sweeten wrote: > First, every spi transaction, including a single byte transfer, is > going to generate at least two interrupts. One when the interrupts > are first enabled because the TX FIFO is empty. And a second when > that byte has been transferred and the TX FIFO is again empty. > > The first interrupt can be prevented by priming the TX FIFO before > enabling the interrupts. All you need to do is call ep93xx_spi_read_write > right before ep93xx_spi_enable_interrupts. Nice. That increases the data throughput from 367 to 372 kB/sec and reduces the CPU usage from 61 to 60.2% for large transfers M ------------------------------------------------------------------------------