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From: luca.ceresoli@bootlin.com
To: David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Thierry Reding <thierry.reding@gmail.com>,
	Jonathan Hunter <jonathanh@nvidia.com>,
	Sowjanya Komatineni <skomatineni@nvidia.com>,
	Mauro Carvalho Chehab <mchehab@kernel.org>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	Hans Verkuil <hverkuil-cisco@xs4all.nl>,
	Dmitry Osipenko <digetx@gmail.com>
Cc: Luca Ceresoli <luca.ceresoli@bootlin.com>,
	linux-media@vger.kernel.org, linux-tegra@vger.kernel.org,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-staging@lists.linux.dev,
	Thomas Petazzoni <thomas.petazzoni@bootlin.com>,
	Richard Leitner <richard.leitner@skidata.com>
Subject: [PATCH 02/23] dt-bindings: display: tegra: vi: add 'vip' property and example
Date: Wed,  9 Nov 2022 15:18:31 +0100	[thread overview]
Message-ID: <20221109141852.729246-3-luca.ceresoli@bootlin.com> (raw)
In-Reply-To: <20221109141852.729246-1-luca.ceresoli@bootlin.com>

From: Luca Ceresoli <luca.ceresoli@bootlin.com>

The Tegra20 VI peripheral can receive parallel input from the VIP parallel
input module. Add it to the allowed properties and augment the existing
nvidia,tegra20-vi example to show a 'vip' property.

Signed-off-by: Luca Ceresoli <luca.ceresoli@bootlin.com>
---
 .../display/tegra/nvidia,tegra20-vi.yaml      | 68 +++++++++++++++++++
 MAINTAINERS                                   |  1 +
 2 files changed, 69 insertions(+)

diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml
index 782a4b10150a..aab795241dd6 100644
--- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml
+++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml
@@ -74,6 +74,22 @@ properties:
   avdd-dsi-csi-supply:
     description: DSI/CSI power supply. Must supply 1.2 V.
 
+  vip:
+    $ref: /schemas/display/tegra/nvidia,tegra20-vip.yaml
+
+  ports:
+    $ref: /schemas/graph.yaml#/properties/ports
+
+    properties:
+      port@0:
+        $ref: /schemas/graph.yaml#/properties/port
+        description:
+          Input from the VIP (parallel input capture) module
+
+        properties:
+          endpoint:
+            $ref: /schemas/graph.yaml#/properties/endpoint
+
 patternProperties:
   "^csi@[0-9a-f]+$":
     type: object
@@ -109,6 +125,22 @@ examples:
     #include <dt-bindings/clock/tegra20-car.h>
     #include <dt-bindings/interrupt-controller/arm-gic.h>
 
+    i2c3 {
+        #address-cells = <1>;
+        #size-cells = <0>;
+        camera@48 {
+            compatible = "aptina,mt9v111";
+            reg = <0x48>;
+            clocks = <&camera_clk>;
+
+            port {
+                mt9v111_out: endpoint {
+                    remote-endpoint = <&vi_vip_in>;
+                };
+            };
+        };
+    };
+
     vi@54080000 {
         compatible = "nvidia,tegra20-vi";
         reg = <0x54080000 0x00040000>;
@@ -116,6 +148,42 @@ examples:
         clocks = <&tegra_car TEGRA20_CLK_VI>;
         resets = <&tegra_car 100>;
         reset-names = "vi";
+
+        vip {
+            compatible = "nvidia,tegra20-vip";
+            #address-cells = <1>;
+            #size-cells = <0>;
+            channel@0 {
+                reg = <0>;
+                ports {
+                    #address-cells = <1>;
+                    #size-cells = <0>;
+                    port@0 {
+                        reg = <0>;
+                        vi_vip_in: endpoint {
+                            remote-endpoint = <&mt9v111_out>;
+                        };
+                    };
+                    port@1 {
+                        reg = <1>;
+                        vi_vip_out: endpoint {
+                            remote-endpoint = <&vi_in>;
+                        };
+                    };
+                };
+            };
+        };
+
+        ports {
+            #address-cells = <1>;
+            #size-cells = <0>;
+            port@0 {
+                reg = <0>;
+                vi_in: endpoint {
+                    remote-endpoint = <&vi_vip_out>;
+                };
+            };
+        };
     };
 
   - |
diff --git a/MAINTAINERS b/MAINTAINERS
index b43f6f4e8ccf..0a4f66a32e45 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -20284,6 +20284,7 @@ M:	Luca Ceresoli <luca.ceresoli@bootlin.com>
 L:	linux-media@vger.kernel.org
 L:	linux-tegra@vger.kernel.org
 S:	Maintained
+F:	Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml
 F:	Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vip.yaml
 
 TEGRA XUSB PADCTL DRIVER
-- 
2.34.1


  parent reply	other threads:[~2022-11-09 14:19 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-11-09 14:18 [PATCH 00/23] Add Tegra20 parallel video input capture luca.ceresoli
2022-11-09 14:18 ` [PATCH 01/23] dt-bindings: display: tegra: add bindings for Tegra20 VIP luca.ceresoli
2022-11-15 12:12   ` Krzysztof Kozlowski
2022-11-18  9:08     ` Luca Ceresoli
2022-11-18 13:11       ` Krzysztof Kozlowski
2022-11-09 14:18 ` luca.ceresoli [this message]
2022-11-15 12:15   ` [PATCH 02/23] dt-bindings: display: tegra: vi: add 'vip' property and example Krzysztof Kozlowski
2022-11-09 14:18 ` [PATCH 03/23] ARM: dts: tegra20: add label to nvidia,tegra20-vi node luca.ceresoli
2022-11-15 12:16   ` Krzysztof Kozlowski
2022-11-09 14:18 ` [PATCH 04/23] ARM: dts: tegra20-tamonten: add label to avdd_vdac regulator luca.ceresoli
2022-11-15 12:16   ` Krzysztof Kozlowski
2022-11-09 14:18 ` [PATCH 05/23] staging: media: tegra-video: fix .vidioc_enum_fmt_vid_cap to return all formats luca.ceresoli
2022-11-09 14:18 ` [PATCH 06/23] staging: media: tegra-video: improve documentation of tegra_video_format fields luca.ceresoli
2022-11-09 14:18 ` [PATCH 07/23] staging: media: tegra-video: document tegra_channel_get_remote_source_subdev luca.ceresoli
2022-11-09 14:18 ` [PATCH 08/23] staging: media: tegra-video: fix typos in comment luca.ceresoli
2022-11-09 14:18 ` [PATCH 09/23] staging: media: tegra-video: improve error messages luca.ceresoli
2022-11-09 14:18 ` [PATCH 10/23] staging: media: tegra-video: slightly simplify cleanup on errors luca.ceresoli
2022-11-09 14:18 ` [PATCH 11/23] staging: media: tegra-video: move private struct declaration to C file luca.ceresoli
2022-11-09 14:18 ` [PATCH 12/23] staging: media: tegra-video: remove unneeded include luca.ceresoli
2022-11-09 14:18 ` [PATCH 13/23] staging: media: tegra-video: Kconfig: allow TPG only on Tegra210 luca.ceresoli
2022-11-09 14:18 ` [PATCH 14/23] staging: media: tegra-video: move tegra_channel_fmt_align to a per-soc op luca.ceresoli
2022-11-09 14:18 ` [PATCH 15/23] staging: media: tegra-video: move default format to soc-specific data luca.ceresoli
2022-11-09 14:18 ` [PATCH 16/23] staging: media: tegra-video: move MIPI calibration calls from VI to CSI luca.ceresoli
2022-11-09 14:18 ` [PATCH 17/23] staging: media: tegra-video: add a per-soc enable/disable op luca.ceresoli
2022-11-09 14:18 ` [PATCH 18/23] staging: media: tegra-video: move syncpt init/free to a per-soc op luca.ceresoli
2022-11-09 14:18 ` [PATCH 19/23] staging: media: tegra-video: add syncpts for Tegra20 to struct tegra_vi luca.ceresoli
2022-11-09 14:18 ` [PATCH 20/23] staging: media: tegra-video: add hooks for planar YUV and H/V flip luca.ceresoli
2022-11-09 14:18 ` [PATCH 21/23] staging: media: tegra-video: add H/V flip controls luca.ceresoli
2022-11-09 14:18 ` [PATCH 22/23] staging: media: tegra-video: add support for VIP (parallel video input) luca.ceresoli
2022-11-09 14:18 ` [PATCH 23/23] staging: media: tegra-video: add tegra20 variant luca.ceresoli
2022-11-09 16:25   ` Luca Ceresoli
2022-11-24  8:36 ` [PATCH 00/23] Add Tegra20 parallel video input capture Hans Verkuil
2022-11-24 14:56   ` Luca Ceresoli

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