From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1F67E27448 for ; Tue, 10 Oct 2023 15:38:12 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="djM/amio" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0B1E1C433C8; Tue, 10 Oct 2023 15:38:08 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696952291; bh=+kmHcwODZk6UkOu99a2F6yiTO4YQ3ydma7Qh6cgxTNg=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=djM/amio/lahxFk6SYm+/ih9uTYv006zWzslUaZPO3MWVV0tH+fr65xaYxQDGOloQ 170Sn3vaacdM0NZOs2oZ32jlE4L0fHNz6qEuRnHS/5gb79hHBSRVJREJ/570Zz4m7k 5wcNCTGzmRwuKGxHTR4VwgYM/oS3HdWLr5XVpg+p+l+LHObHJvzmOPAo5YuW6Yhe5K a5EUQk+IoaHVkkDdxLtAXcgaJBUOH3WTrcTMshE7od3J7Q6voScwT24IBN6uWQY/ap 43c3LHXeDrn7WNLaHXJUgqf683ZCn1XAke6Mw44BB25BffJ6Kqx1qFEZ/NoZ0WqXBx lwWJF/B3AvH+A== Date: Tue, 10 Oct 2023 16:38:23 +0100 From: Jonathan Cameron To: David Lechner Cc: linux-iio@vger.kernel.org, linux-staging@lists.linux.dev, Michael Hennerich , Nuno =?UTF-8?B?U8Oh?= , Axel Haslam , Philip Molloy , linux-kernel@vger.kernel.org Subject: Re: [PATCH v4 01/17] staging: iio: resolver: ad2s1210: do not use fault register for dummy read Message-ID: <20231010163823.00612bdd@jic23-huawei> In-Reply-To: <20231005-ad2s1210-mainline-v4-1-ec00746840fc@baylibre.com> References: <20231005-ad2s1210-mainline-v4-0-ec00746840fc@baylibre.com> <20231005-ad2s1210-mainline-v4-1-ec00746840fc@baylibre.com> X-Mailer: Claws Mail 4.1.1 (GTK 3.24.38; x86_64-pc-linux-gnu) Precedence: bulk X-Mailing-List: linux-staging@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Thu, 5 Oct 2023 19:50:18 -0500 David Lechner wrote: > When reading registers on the AD2S1210 chip, we have to supply a "dummy" > address for the second SPI tx byte so that we don't accidentally write > to a register. This register will be read and the value discarded on the > next regmap read or write call. > > Reading the fault register has a side-effect of clearing the faults > so we should not use this register for the dummy read. > > Signed-off-by: David Lechner ouch. Applied to the togreg branch of iio.git and pushed out as testing for 0day to take a look at it. Thanks, Jonathan > --- > > v4 changes: New patch > > (this probably should have been done before "staging: iio: resolver: > ad2s1210: use regmap for config registers" but was overlooked until now) > > drivers/staging/iio/resolver/ad2s1210.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/drivers/staging/iio/resolver/ad2s1210.c b/drivers/staging/iio/resolver/ad2s1210.c > index 67d8af0dd7ae..8fbde9517fe9 100644 > --- a/drivers/staging/iio/resolver/ad2s1210.c > +++ b/drivers/staging/iio/resolver/ad2s1210.c > @@ -166,9 +166,10 @@ static int ad2s1210_regmap_reg_read(void *context, unsigned int reg, > st->tx[0] = reg; > /* > * Must be valid register address here otherwise this could write data. > - * It doesn't matter which one. > + * It doesn't matter which one as long as reading doesn't have side- > + * effects. > */ > - st->tx[1] = AD2S1210_REG_FAULT; > + st->tx[1] = AD2S1210_REG_CONTROL; > > ret = spi_sync_transfer(st->sdev, xfers, ARRAY_SIZE(xfers)); > if (ret < 0) >