From: Da Xue <da@libre.computer>
To: "Lars-Peter Clausen" <lars@metafoo.de>,
"Michael Hennerich" <Michael.Hennerich@analog.com>,
"Jonathan Cameron" <jic23@kernel.org>,
"David Lechner" <dlechner@baylibre.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Mark Brown" <broonie@kernel.org>,
"Rui Miguel Silva" <rmfrfs@gmail.com>,
"Viresh Kumar" <vireshk@kernel.org>,
"Johan Hovold" <johan@kernel.org>,
"Alex Elder" <elder@kernel.org>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>
Cc: Da Xue <da@libre.computer>,
linux-iio@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-spi@vger.kernel.org, greybus-dev@lists.linaro.org,
linux-staging@lists.linux.dev
Subject: [RFC] spi: expand bits_per_word_mask to 64 bits
Date: Tue, 10 Jun 2025 20:05:15 -0400 [thread overview]
Message-ID: <20250611000516.1383268-1-da@libre.computer> (raw)
Most current controller IP support 64-bit words.
Update the mask to u64 from u32.
Signed-off-by: Da Xue <da@libre.computer>
---
drivers/iio/adc/ad7949.c | 2 +-
drivers/spi/spi-dln2.c | 2 +-
drivers/spi/spi-ingenic.c | 2 +-
drivers/spi/spi-sh-msiof.c | 2 +-
drivers/spi/spi.c | 4 ++--
drivers/staging/greybus/spilib.c | 2 +-
include/linux/spi/altera.h | 2 +-
include/linux/spi/spi.h | 6 +++---
8 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/drivers/iio/adc/ad7949.c b/drivers/iio/adc/ad7949.c
index edd0c3a35ab7..469789ffa4a3 100644
--- a/drivers/iio/adc/ad7949.c
+++ b/drivers/iio/adc/ad7949.c
@@ -308,7 +308,7 @@ static void ad7949_disable_reg(void *reg)
static int ad7949_spi_probe(struct spi_device *spi)
{
- u32 spi_ctrl_mask = spi->controller->bits_per_word_mask;
+ u64 spi_ctrl_mask = spi->controller->bits_per_word_mask;
struct device *dev = &spi->dev;
const struct ad7949_adc_spec *spec;
struct ad7949_adc_chip *ad7949_adc;
diff --git a/drivers/spi/spi-dln2.c b/drivers/spi/spi-dln2.c
index 2013bc56ded8..cccbb00ad5ce 100644
--- a/drivers/spi/spi-dln2.c
+++ b/drivers/spi/spi-dln2.c
@@ -315,7 +315,7 @@ static int dln2_spi_set_bpw(struct dln2_spi *dln2, u8 bpw)
}
static int dln2_spi_get_supported_frame_sizes(struct dln2_spi *dln2,
- u32 *bpw_mask)
+ u64 *bpw_mask)
{
int ret;
struct {
diff --git a/drivers/spi/spi-ingenic.c b/drivers/spi/spi-ingenic.c
index 318b0768701e..21d453d6e46e 100644
--- a/drivers/spi/spi-ingenic.c
+++ b/drivers/spi/spi-ingenic.c
@@ -51,7 +51,7 @@
#define SPI_INGENIC_FIFO_SIZE 128u
struct jz_soc_info {
- u32 bits_per_word_mask;
+ u64 bits_per_word_mask;
struct reg_field flen_field;
bool has_trendian;
diff --git a/drivers/spi/spi-sh-msiof.c b/drivers/spi/spi-sh-msiof.c
index 94a867967e02..97f5a6192279 100644
--- a/drivers/spi/spi-sh-msiof.c
+++ b/drivers/spi/spi-sh-msiof.c
@@ -33,7 +33,7 @@
#define SH_MSIOF_FLAG_FIXED_DTDL_200 BIT(0)
struct sh_msiof_chipdata {
- u32 bits_per_word_mask;
+ u64 bits_per_word_mask;
u16 tx_fifo_size;
u16 rx_fifo_size;
u16 ctlr_flags;
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index 1bc0fdbb1bd7..4f47201f2462 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -3824,8 +3824,8 @@ static int __spi_validate_bits_per_word(struct spi_controller *ctlr,
u8 bits_per_word)
{
if (ctlr->bits_per_word_mask) {
- /* Only 32 bits fit in the mask */
- if (bits_per_word > 32)
+ /* Only 64 bits fit in the mask */
+ if (bits_per_word > 64)
return -EINVAL;
if (!(ctlr->bits_per_word_mask & SPI_BPW_MASK(bits_per_word)))
return -EINVAL;
diff --git a/drivers/staging/greybus/spilib.c b/drivers/staging/greybus/spilib.c
index 24e9c909fa02..087eed1879b1 100644
--- a/drivers/staging/greybus/spilib.c
+++ b/drivers/staging/greybus/spilib.c
@@ -27,7 +27,7 @@ struct gb_spilib {
unsigned int op_timeout;
u16 mode;
u16 flags;
- u32 bits_per_word_mask;
+ u64 bits_per_word_mask;
u8 num_chipselect;
u32 min_speed_hz;
u32 max_speed_hz;
diff --git a/include/linux/spi/altera.h b/include/linux/spi/altera.h
index 3b74c3750caf..d6e036ed00e2 100644
--- a/include/linux/spi/altera.h
+++ b/include/linux/spi/altera.h
@@ -24,7 +24,7 @@
struct altera_spi_platform_data {
u16 mode_bits;
u16 num_chipselect;
- u32 bits_per_word_mask;
+ u64 bits_per_word_mask;
u16 num_devices;
struct spi_board_info *devices;
};
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index 4789f91dae94..f44120d5a63c 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -586,7 +586,7 @@ struct spi_controller {
u32 buswidth_override_bits;
/* Bitmask of supported bits_per_word for transfers */
- u32 bits_per_word_mask;
+ u64 bits_per_word_mask;
#define SPI_BPW_MASK(bits) BIT((bits) - 1)
#define SPI_BPW_RANGE_MASK(min, max) GENMASK((max) - 1, (min) - 1)
@@ -1329,9 +1329,9 @@ spi_max_transfer_size(struct spi_device *spi)
*/
static inline bool spi_is_bpw_supported(struct spi_device *spi, u32 bpw)
{
- u32 bpw_mask = spi->controller->bits_per_word_mask;
+ u64 bpw_mask = spi->controller->bits_per_word_mask;
- if (bpw == 8 || (bpw <= 32 && bpw_mask & SPI_BPW_MASK(bpw)))
+ if (bpw == 8 || (bpw <= 64 && bpw_mask & SPI_BPW_MASK(bpw)))
return true;
return false;
--
2.39.5
next reply other threads:[~2025-06-11 0:06 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-06-11 0:05 Da Xue [this message]
2025-06-11 8:30 ` [RFC] spi: expand bits_per_word_mask to 64 bits Andy Shevchenko
2025-06-11 11:12 ` Mark Brown
2025-06-11 14:16 ` David Lechner
2025-06-11 14:21 ` Mark Brown
2025-06-11 14:54 ` Andy Shevchenko
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