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From: Gabriel Windlin <gawindlin@gmail.com>
To: Sudip Mukherjee <sudipm.mukherjee@gmail.com>,
	Teddy Wang <teddy.wang@siliconmotion.com>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-fbdev@vger.kernel.org, linux-staging@lists.linux.dev,
	linux-kernel@vger.kernel.org
Cc: Gabriel Windlin <gawindlin@gmail.com>
Subject: [PATCH 4/8] staging: sm750fb: remove unused alpha and cursor register definitions
Date: Wed,  4 Mar 2026 00:24:25 +0100	[thread overview]
Message-ID: <20260303232434.1850583-4-gawindlin@gmail.com> (raw)
In-Reply-To: <20260303232434.1850583-1-gawindlin@gmail.com>

The VIDEO_ALPHA sub-register macros (FB_ADDRESS, FB_WIDTH, PLANE_TL,
PLANE_BR, SCALE, CHROMA_KEY, COLOR_LOOKUP_*), the PANEL_HWC hardware
cursor register macros, and the ALPHA sub-register macros defined in
ddk750_reg.h are not referenced anywhere in the driver. The register
addresses VIDEO_ALPHA_DISPLAY_CTRL and ALPHA_DISPLAY_CTRL are kept as
they are still in use. Remove the rest to reduce dead code as noted in
the TODO file.

Signed-off-by: Gabriel Windlin <gawindlin@gmail.com>
---
 drivers/staging/sm750fb/ddk750_reg.h | 282 ---------------------------
 1 file changed, 282 deletions(-)

diff --git a/drivers/staging/sm750fb/ddk750_reg.h b/drivers/staging/sm750fb/ddk750_reg.h
index efdafa993e86..24e826c31721 100644
--- a/drivers/staging/sm750fb/ddk750_reg.h
+++ b/drivers/staging/sm750fb/ddk750_reg.h
@@ -674,292 +674,10 @@
 /* Video Alpha Control */
 
 #define VIDEO_ALPHA_DISPLAY_CTRL                        0x080080
-#define VIDEO_ALPHA_DISPLAY_CTRL_SELECT                 BIT(28)
-#define VIDEO_ALPHA_DISPLAY_CTRL_ALPHA_MASK             (0xf << 24)
-#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_MASK              (0x3 << 16)
-#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_1                 (0x0 << 16)
-#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_3                 (0x1 << 16)
-#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_7                 (0x2 << 16)
-#define VIDEO_ALPHA_DISPLAY_CTRL_FIFO_11                (0x3 << 16)
-#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_SCALE             BIT(11)
-#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_SCALE             BIT(10)
-#define VIDEO_ALPHA_DISPLAY_CTRL_VERT_MODE              BIT(9)
-#define VIDEO_ALPHA_DISPLAY_CTRL_HORZ_MODE              BIT(8)
-#define VIDEO_ALPHA_DISPLAY_CTRL_PIXEL_MASK             (0xf << 4)
-#define VIDEO_ALPHA_DISPLAY_CTRL_CHROMA_KEY             BIT(3)
-#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_MASK            0x3
-#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_8               0x0
-#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_16              0x1
-#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4       0x2
-#define VIDEO_ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4   0x3
-
-#define VIDEO_ALPHA_FB_ADDRESS                        0x080084
-#define VIDEO_ALPHA_FB_ADDRESS_STATUS                 BIT(31)
-#define VIDEO_ALPHA_FB_ADDRESS_EXT                    BIT(27)
-#define VIDEO_ALPHA_FB_ADDRESS_ADDRESS_MASK           0x3ffffff
-
-#define VIDEO_ALPHA_FB_WIDTH                          0x080088
-#define VIDEO_ALPHA_FB_WIDTH_WIDTH_MASK               (0x3fff << 16)
-#define VIDEO_ALPHA_FB_WIDTH_OFFSET_MASK              0x3fff
-
-#define VIDEO_ALPHA_FB_LAST_ADDRESS                   0x08008C
-#define VIDEO_ALPHA_FB_LAST_ADDRESS_EXT               BIT(27)
-#define VIDEO_ALPHA_FB_LAST_ADDRESS_ADDRESS_MASK      0x3ffffff
-
-#define VIDEO_ALPHA_PLANE_TL                          0x080090
-#define VIDEO_ALPHA_PLANE_TL_TOP_MASK                 (0x7ff << 16)
-#define VIDEO_ALPHA_PLANE_TL_LEFT_MASK                0x7ff
-
-#define VIDEO_ALPHA_PLANE_BR                          0x080094
-#define VIDEO_ALPHA_PLANE_BR_BOTTOM_MASK              (0x7ff << 16)
-#define VIDEO_ALPHA_PLANE_BR_RIGHT_MASK               0x7ff
-
-#define VIDEO_ALPHA_SCALE                             0x080098
-#define VIDEO_ALPHA_SCALE_VERTICAL_MODE               BIT(31)
-#define VIDEO_ALPHA_SCALE_VERTICAL_SCALE_MASK         (0xfff << 16)
-#define VIDEO_ALPHA_SCALE_HORIZONTAL_MODE             BIT(15)
-#define VIDEO_ALPHA_SCALE_HORIZONTAL_SCALE_MASK       0xfff
-
-#define VIDEO_ALPHA_INITIAL_SCALE                     0x08009C
-#define VIDEO_ALPHA_INITIAL_SCALE_VERTICAL_MASK       (0xfff << 16)
-#define VIDEO_ALPHA_INITIAL_SCALE_HORIZONTAL_MASK     0xfff
-
-#define VIDEO_ALPHA_CHROMA_KEY                        0x0800A0
-#define VIDEO_ALPHA_CHROMA_KEY_MASK_MASK              (0xffff << 16)
-#define VIDEO_ALPHA_CHROMA_KEY_VALUE_MASK             0xffff
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_01                   0x0800A4
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_1_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_01_0_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_23                   0x0800A8
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_3_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_23_2_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_45                   0x0800AC
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_5_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_45_4_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_67                   0x0800B0
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_7_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_67_6_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_89                   0x0800B4
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_9_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_89_8_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB                   0x0800B8
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_B_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_AB_A_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD                   0x0800BC
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_D_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_CD_C_BLUE_MASK       0x1f
-
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF                   0x0800C0
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_MASK            (0xffff << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_RED_MASK        (0x1f << 27)
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_GREEN_MASK      (0x3f << 21)
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_F_BLUE_MASK       (0x1f << 16)
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_MASK            0xffff
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_RED_MASK        (0x1f << 11)
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_GREEN_MASK      (0x3f << 5)
-#define VIDEO_ALPHA_COLOR_LOOKUP_EF_E_BLUE_MASK       0x1f
-
-/* Panel Cursor Control */
-
-#define PANEL_HWC_ADDRESS                             0x0800F0
-#define PANEL_HWC_ADDRESS_ENABLE                      BIT(31)
-#define PANEL_HWC_ADDRESS_EXT                         BIT(27)
-#define PANEL_HWC_ADDRESS_ADDRESS_MASK                0x3ffffff
-
-#define PANEL_HWC_LOCATION                            0x0800F4
-#define PANEL_HWC_LOCATION_TOP                        BIT(27)
-#define PANEL_HWC_LOCATION_Y_MASK                     (0x7ff << 16)
-#define PANEL_HWC_LOCATION_LEFT                       BIT(11)
-#define PANEL_HWC_LOCATION_X_MASK                     0x7ff
-
-#define PANEL_HWC_COLOR_12                            0x0800F8
-#define PANEL_HWC_COLOR_12_2_RGB565_MASK              (0xffff << 16)
-#define PANEL_HWC_COLOR_12_1_RGB565_MASK              0xffff
-
-#define PANEL_HWC_COLOR_3                             0x0800FC
-#define PANEL_HWC_COLOR_3_RGB565_MASK                 0xffff
-
-/* Old Definitions +++ */
-#define PANEL_HWC_COLOR_01                            0x0800F8
-#define PANEL_HWC_COLOR_01_1_RED_MASK                 (0x1f << 27)
-#define PANEL_HWC_COLOR_01_1_GREEN_MASK               (0x3f << 21)
-#define PANEL_HWC_COLOR_01_1_BLUE_MASK                (0x1f << 16)
-#define PANEL_HWC_COLOR_01_0_RED_MASK                 (0x1f << 11)
-#define PANEL_HWC_COLOR_01_0_GREEN_MASK               (0x3f << 5)
-#define PANEL_HWC_COLOR_01_0_BLUE_MASK                0x1f
-
-#define PANEL_HWC_COLOR_2                             0x0800FC
-#define PANEL_HWC_COLOR_2_RED_MASK                    (0x1f << 11)
-#define PANEL_HWC_COLOR_2_GREEN_MASK                  (0x3f << 5)
-#define PANEL_HWC_COLOR_2_BLUE_MASK                   0x1f
-/* Old Definitions --- */
 
 /* Alpha Control */
 
 #define ALPHA_DISPLAY_CTRL                            0x080100
-#define ALPHA_DISPLAY_CTRL_SELECT                     BIT(28)
-#define ALPHA_DISPLAY_CTRL_ALPHA_MASK                 (0xf << 24)
-#define ALPHA_DISPLAY_CTRL_FIFO_MASK                  (0x3 << 16)
-#define ALPHA_DISPLAY_CTRL_FIFO_1                     (0x0 << 16)
-#define ALPHA_DISPLAY_CTRL_FIFO_3                     (0x1 << 16)
-#define ALPHA_DISPLAY_CTRL_FIFO_7                     (0x2 << 16)
-#define ALPHA_DISPLAY_CTRL_FIFO_11                    (0x3 << 16)
-#define ALPHA_DISPLAY_CTRL_PIXEL_MASK                 (0xf << 4)
-#define ALPHA_DISPLAY_CTRL_CHROMA_KEY                 BIT(3)
-#define ALPHA_DISPLAY_CTRL_FORMAT_MASK                0x3
-#define ALPHA_DISPLAY_CTRL_FORMAT_16                  0x1
-#define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4           0x2
-#define ALPHA_DISPLAY_CTRL_FORMAT_ALPHA_4_4_4_4       0x3
-
-#define ALPHA_FB_ADDRESS                              0x080104
-#define ALPHA_FB_ADDRESS_STATUS                       BIT(31)
-#define ALPHA_FB_ADDRESS_EXT                          BIT(27)
-#define ALPHA_FB_ADDRESS_ADDRESS_MASK                 0x3ffffff
-
-#define ALPHA_FB_WIDTH                                0x080108
-#define ALPHA_FB_WIDTH_WIDTH_MASK                     (0x3fff << 16)
-#define ALPHA_FB_WIDTH_OFFSET_MASK                    0x3fff
-
-#define ALPHA_PLANE_TL                                0x08010C
-#define ALPHA_PLANE_TL_TOP_MASK                       (0x7ff << 16)
-#define ALPHA_PLANE_TL_LEFT_MASK                      0x7ff
-
-#define ALPHA_PLANE_BR                                0x080110
-#define ALPHA_PLANE_BR_BOTTOM_MASK                    (0x7ff << 16)
-#define ALPHA_PLANE_BR_RIGHT_MASK                     0x7ff
-
-#define ALPHA_CHROMA_KEY                              0x080114
-#define ALPHA_CHROMA_KEY_MASK_MASK                    (0xffff << 16)
-#define ALPHA_CHROMA_KEY_VALUE_MASK                   0xffff
-
-#define ALPHA_COLOR_LOOKUP_01                         0x080118
-#define ALPHA_COLOR_LOOKUP_01_1_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_01_1_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_01_1_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_01_1_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_01_0_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_01_0_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_01_0_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_01_0_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_23                         0x08011C
-#define ALPHA_COLOR_LOOKUP_23_3_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_23_3_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_23_3_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_23_3_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_23_2_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_23_2_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_23_2_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_23_2_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_45                         0x080120
-#define ALPHA_COLOR_LOOKUP_45_5_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_45_5_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_45_5_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_45_5_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_45_4_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_45_4_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_45_4_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_45_4_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_67                         0x080124
-#define ALPHA_COLOR_LOOKUP_67_7_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_67_7_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_67_7_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_67_7_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_67_6_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_67_6_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_67_6_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_67_6_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_89                         0x080128
-#define ALPHA_COLOR_LOOKUP_89_9_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_89_9_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_89_9_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_89_9_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_89_8_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_89_8_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_89_8_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_89_8_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_AB                         0x08012C
-#define ALPHA_COLOR_LOOKUP_AB_B_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_AB_B_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_AB_B_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_AB_B_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_AB_A_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_AB_A_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_AB_A_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_AB_A_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_CD                         0x080130
-#define ALPHA_COLOR_LOOKUP_CD_D_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_CD_D_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_CD_D_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_CD_D_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_CD_C_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_CD_C_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_CD_C_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_CD_C_BLUE_MASK             0x1f
-
-#define ALPHA_COLOR_LOOKUP_EF                         0x080134
-#define ALPHA_COLOR_LOOKUP_EF_F_MASK                  (0xffff << 16)
-#define ALPHA_COLOR_LOOKUP_EF_F_RED_MASK              (0x1f << 27)
-#define ALPHA_COLOR_LOOKUP_EF_F_GREEN_MASK            (0x3f << 21)
-#define ALPHA_COLOR_LOOKUP_EF_F_BLUE_MASK             (0x1f << 16)
-#define ALPHA_COLOR_LOOKUP_EF_E_MASK                  0xffff
-#define ALPHA_COLOR_LOOKUP_EF_E_RED_MASK              (0x1f << 11)
-#define ALPHA_COLOR_LOOKUP_EF_E_GREEN_MASK            (0x3f << 5)
-#define ALPHA_COLOR_LOOKUP_EF_E_BLUE_MASK             0x1f
 
 /* CRT Graphics Control */
 
-- 
2.53.0


  parent reply	other threads:[~2026-03-03 23:25 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-03-03 23:24 [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Gabriel Windlin
2026-03-03 23:24 ` [PATCH 2/8] staging: sm750fb: remove unused CSC register definitions Gabriel Windlin
2026-03-03 23:24 ` [PATCH 3/8] staging: sm750fb: remove unused ZV capture " Gabriel Windlin
2026-03-03 23:24 ` Gabriel Windlin [this message]
2026-03-03 23:24 ` [PATCH 5/8] staging: sm750fb: remove unused memory arbitration " Gabriel Windlin
2026-03-03 23:24 ` [PATCH 6/8] staging: sm750fb: remove unused interrupt " Gabriel Windlin
2026-03-03 23:24 ` [PATCH 7/8] staging: sm750fb: remove unused CURRENT_GATE, CRT_HWC, and DMA " Gabriel Windlin
2026-03-04  8:10   ` Dan Carpenter
2026-03-03 23:24 ` [PATCH 8/8] staging: sm750fb: remove unused GPIO bit field and interrupt definitions Gabriel Windlin
2026-03-09 16:39 ` [PATCH 1/8] staging: sm750fb: remove unused GPIO_MUX bit field definitions Greg Kroah-Hartman

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