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Thu, 05 Mar 2026 23:17:49 -0800 (PST) From: Michael Harris Date: Thu, 05 Mar 2026 23:17:01 -0800 Subject: [PATCH v2 4/4] staging: iio: adt7316: convert magic numbers to BIT_U32() or GENMASK_U32() Precedence: bulk X-Mailing-List: linux-staging@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260305-adt7316-correct-macros-v2-4-3702e3841c42@gmail.com> References: <20260305-adt7316-correct-macros-v2-0-3702e3841c42@gmail.com> In-Reply-To: <20260305-adt7316-correct-macros-v2-0-3702e3841c42@gmail.com> To: Lars-Peter Clausen , Michael Hennerich , Jonathan Cameron , Greg Kroah-Hartman Cc: David Lechner , =?utf-8?q?Nuno_S=C3=A1?= , Andy Shevchenko , linux-iio@vger.kernel.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, Michael Harris X-Mailer: b4 0.14.2 X-Developer-Signature: v=1; a=ed25519-sha256; t=1772781459; l=5562; i=michaelharriscode@gmail.com; s=20260130; h=from:subject:message-id; bh=0rAB9MBGoOdOMIG3fhy02OT6Cyxc/u79BMxz/VaekZ4=; b=5MBgmK5XwbhRJgOsfvxYxLgjH4BN49GWnBZYl3dSOPGCax98N3pasMXF75qbVcJkAPUcEob+N 1onOStR7tCWBqV0kO2gxF8uoRwU2+SgrM3tkVlKUBpLfbGQNyJvH96w X-Developer-Key: i=michaelharriscode@gmail.com; a=ed25519; pk=td/zQD3XANAhdG3Kf3mSetXiynk1Ql0eM4s0+eks5DU= Improve readability by converting raw hex macros to use BIT_U32() or GENMASK_U32() instead. Signed-off-by: Michael Harris --- drivers/staging/iio/addac/adt7316.c | 72 ++++++++++++++++++------------------- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/drivers/staging/iio/addac/adt7316.c b/drivers/staging/iio/addac/adt7316.c index ea7d97bb0f378f3a3ce1225d8d13af2c5955ca56..824801c022475c35b8dfd4626820a533fbb68a17 100644 --- a/drivers/staging/iio/addac/adt7316.c +++ b/drivers/staging/iio/addac/adt7316.c @@ -30,8 +30,8 @@ #define ADT7316_INT_STAT1 0x0 #define ADT7316_INT_STAT2 0x1 #define ADT7316_LSB_IN_TEMP_VDD 0x3 -#define ADT7316_LSB_IN_TEMP_MASK 0x3 -#define ADT7316_LSB_VDD_MASK 0xC +#define ADT7316_LSB_IN_TEMP_MASK GENMASK_U32(1, 0) +#define ADT7316_LSB_VDD_MASK GENMASK_U32(3, 2) #define ADT7316_LSB_EX_TEMP_AIN 0x4 #define ADT7316_LSB_EX_TEMP_AIN1_MASK GENMASK_U32(1, 0) #define ADT7516_LSB_AIN2_MASK GENMASK_U32(3, 2) @@ -90,19 +90,19 @@ /* * ADT7316 config1 */ -#define ADT7316_CONFIG1_MONITOR_EN 0x1 -#define ADT7516_CONFIG1_SEL_AIN1_2_EX_TEMP_MASK 0x6 -#define ADT7516_CONFIG1_SEL_EX_TEMP 0x4 -#define ADT7516_CONFIG1_SEL_AIN3 0x8 -#define ADT7316_CONFIG1_INT_EN 0x20 -#define ADT7316_CONFIG1_INT_POLARITY 0x40 -#define ADT7316_CONFIG1_PD 0x80 +#define ADT7316_CONFIG1_MONITOR_EN BIT_U32(0) +#define ADT7516_CONFIG1_SEL_AIN1_2_EX_TEMP_MASK GENMASK_U32(2, 1) +#define ADT7516_CONFIG1_SEL_EX_TEMP BIT_U32(2) +#define ADT7516_CONFIG1_SEL_AIN3 BIT_U32(3) +#define ADT7316_CONFIG1_INT_EN BIT_U32(5) +#define ADT7316_CONFIG1_INT_POLARITY BIT_U32(6) +#define ADT7316_CONFIG1_PD BIT_U32(7) /* * ADT7316 config2 */ -#define ADT7316_CONFIG2_AD_SINGLE_CH_MASK 0x3 -#define ADT7516_CONFIG2_AD_SINGLE_CH_MASK 0x7 +#define ADT7316_CONFIG2_AD_SINGLE_CH_MASK GENMASK_U32(1, 0) +#define ADT7516_CONFIG2_AD_SINGLE_CH_MASK GENMASK_U32(2, 0) #define ADT7316_CONFIG2_AD_SINGLE_CH_VDD 0 #define ADT7316_CONFIG2_AD_SINGLE_CH_IN 1 #define ADT7316_CONFIG2_AD_SINGLE_CH_EX 2 @@ -110,51 +110,51 @@ #define ADT7516_CONFIG2_AD_SINGLE_CH_AIN2 3 #define ADT7516_CONFIG2_AD_SINGLE_CH_AIN3 4 #define ADT7516_CONFIG2_AD_SINGLE_CH_AIN4 5 -#define ADT7316_CONFIG2_AD_SINGLE_CH_MODE 0x10 -#define ADT7316_CONFIG2_DISABLE_AVERAGING 0x20 -#define ADT7316_CONFIG2_EN_SMBUS_TIMEOUT 0x40 -#define ADT7316_CONFIG2_RESET 0x80 +#define ADT7316_CONFIG2_AD_SINGLE_CH_MODE BIT_U32(4) +#define ADT7316_CONFIG2_DISABLE_AVERAGING BIT_U32(5) +#define ADT7316_CONFIG2_EN_SMBUS_TIMEOUT BIT_U32(6) +#define ADT7316_CONFIG2_RESET BIT_U32(7) /* * ADT7316 config3 */ -#define ADT7316_CONFIG3_ADCLK_22_5 0x1 -#define ADT7316_CONFIG3_DA_HIGH_RESOLUTION 0x2 -#define ADT7316_CONFIG3_DA_EN_VIA_DAC_LDAC 0x8 -#define ADT7516_CONFIG3_AIN_IN_VREF 0x10 -#define ADT7316_CONFIG3_EN_IN_TEMP_PROP_DACA 0x20 -#define ADT7316_CONFIG3_EN_EX_TEMP_PROP_DACB 0x40 +#define ADT7316_CONFIG3_ADCLK_22_5 BIT_U32(0) +#define ADT7316_CONFIG3_DA_HIGH_RESOLUTION BIT_U32(1) +#define ADT7316_CONFIG3_DA_EN_VIA_DAC_LDAC BIT_U32(3) +#define ADT7516_CONFIG3_AIN_IN_VREF BIT_U32(4) +#define ADT7316_CONFIG3_EN_IN_TEMP_PROP_DACA BIT_U32(5) +#define ADT7316_CONFIG3_EN_EX_TEMP_PROP_DACB BIT_U32(6) /* * ADT7316 DAC config */ -#define ADT7316_DAC_CONFIG_2VREF_CH_MASK 0xF -#define ADT7316_DAC_CONFIG_EN_MODE_MASK 0x30 +#define ADT7316_DAC_CONFIG_2VREF_CH_MASK GENMASK_U32(3, 0) +#define ADT7316_DAC_CONFIG_EN_MODE_MASK GENMASK_U32(5, 4) #define ADT7316_DAC_CONFIG_EN_MODE_SINGLE 0x00 #define ADT7316_DAC_CONFIG_EN_MODE_AB_CD 0x10 #define ADT7316_DAC_CONFIG_EN_MODE_ABCD 0x20 #define ADT7316_DAC_CONFIG_EN_MODE_LDAC 0x30 -#define ADT7316_DAC_CONFIG_VREF_BYPASS_AB 0x40 -#define ADT7316_DAC_CONFIG_VREF_BYPASS_CD 0x80 +#define ADT7316_DAC_CONFIG_VREF_BYPASS_AB BIT_U32(6) +#define ADT7316_DAC_CONFIG_VREF_BYPASS_CD BIT_U32(7) /* * ADT7316 LDAC config */ -#define ADT7316_LDAC_CONFIG_EN_DA_MASK 0xF -#define ADT7316_LDAC_CONFIG_DAC_IN_VREF 0x10 -#define ADT7516_LDAC_CONFIG_DAC_AB_IN_VREF 0x10 -#define ADT7516_LDAC_CONFIG_DAC_CD_IN_VREF 0x20 -#define ADT7516_LDAC_CONFIG_DAC_IN_VREF_MASK 0x30 +#define ADT7316_LDAC_CONFIG_EN_DA_MASK GENMASK_U32(3, 0) +#define ADT7316_LDAC_CONFIG_DAC_IN_VREF BIT_U32(4) +#define ADT7516_LDAC_CONFIG_DAC_AB_IN_VREF BIT_U32(4) +#define ADT7516_LDAC_CONFIG_DAC_CD_IN_VREF BIT_U32(5) +#define ADT7516_LDAC_CONFIG_DAC_IN_VREF_MASK GENMASK_U32(5, 4) /* * ADT7316 INT_MASK2 */ -#define ADT7316_INT_MASK2_VDD 0x10 +#define ADT7316_INT_MASK2_VDD BIT_U32(4) /* * ADT7316 value masks */ -#define ADT7316_VALUE_MASK 0xfff +#define ADT7316_VALUE_MASK GENMASK_U32(11, 0) #define ADT7316_AD_MSB_MASK GENMASK_U32(9, 2) /* @@ -172,7 +172,7 @@ #define ID_ADT7517 0x12 #define ID_ADT7519 0x14 -#define ID_FAMILY_MASK 0xF0 +#define ID_FAMILY_MASK GENMASK_U32(7, 4) #define ID_ADT73XX 0x0 #define ID_ADT75XX 0x10 @@ -206,9 +206,9 @@ struct adt7316_chip_info { #define ADT7516_AIN2_INT_MASK 0x20 #define ADT7516_AIN3_INT_MASK 0x40 #define ADT7516_AIN4_INT_MASK 0x80 -#define ADT7316_VDD_INT_MASK 0x100 -#define ADT7316_TEMP_INT_MASK 0x1F -#define ADT7516_AIN_INT_MASK 0xE0 +#define ADT7316_VDD_INT_MASK BIT_U32(8) +#define ADT7316_TEMP_INT_MASK GENMASK_U32(4, 0) +#define ADT7516_AIN_INT_MASK GENMASK_U32(7, 5) #define ADT7316_TEMP_AIN_INT_MASK \ (ADT7316_TEMP_INT_MASK) -- 2.53.0