From: osjin83@gmail.com
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Cc: linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org,
osjin83@gmail.com
Subject: [PATCH 3/3] staging: rtl8723bs: remove unnecessary blank lines in rtl8723b_phycfg.c
Date: Wed, 8 Apr 2026 19:32:08 +0900 [thread overview]
Message-ID: <20260408103208.7682-4-osjin83@gmail.com> (raw)
In-Reply-To: <20260408103208.7682-1-osjin83@gmail.com>
From: tas0dev <osjin83@gmail.com>
Remove unnecessary blank lines throughout rtl8723b_phycfg.c to clean
up the code and adhere to the Linux kernel coding style.
Signed-off-by: tas0dev <osjin83@gmail.com>
---
drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c | 14 --------------
1 file changed, 14 deletions(-)
diff --git a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
index 498f7b25a2b5..10eb96105f83 100644
--- a/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
+++ b/drivers/staging/rtl8723bs/hal/rtl8723b_phycfg.c
@@ -25,7 +25,6 @@ static u32 phy_CalculateBitShift(u32 BitMask)
return i;
}
-
/**
* PHY_QueryBBReg_8723B - Read "specific bits" from BB register.
* @Adapter:
@@ -46,10 +45,8 @@ u32 PHY_QueryBBReg_8723B(struct adapter *Adapter, u32 RegAddr, u32 BitMask)
BitShift = phy_CalculateBitShift(BitMask);
return (OriginalValue & BitMask) >> BitShift;
-
}
-
/**
* PHY_SetBBReg_8723B - Write "Specific bits" to BB register (page 8~).
* @Adapter:
@@ -80,10 +77,8 @@ void PHY_SetBBReg_8723B(
}
rtw_write32(Adapter, RegAddr, Data);
-
}
-
/* */
/* 2. RF register R/W API */
/* */
@@ -141,7 +136,6 @@ static u32 phy_RFSerialRead_8723B(
retValue = PHY_QueryBBReg(Adapter, pPhyReg->rfLSSIReadBack | MaskforPhySet, bLSSIReadBackData);
}
return retValue;
-
}
/**
@@ -210,7 +204,6 @@ static void phy_RFSerialWrite_8723B(
PHY_SetBBReg(Adapter, pPhyReg->rf3wireOffset, bMaskDWord, DataAndAddr);
}
-
/**
* PHY_QueryRFReg_8723B - Query "Specific bits" to RF register (page 8~).
* @Adapter:
@@ -272,12 +265,10 @@ void PHY_SetRFReg_8723B(
phy_RFSerialWrite_8723B(Adapter, eRFPath, RegAddr, Data);
}
-
/* */
/* 3. Initial MAC/BB/RF config by reading MAC/BB/RF txt. */
/* */
-
/*-----------------------------------------------------------------------------
* PHY_MACConfig8192C - Config MAC by header file or parameter file.
*
@@ -329,7 +320,6 @@ static void phy_InitBBRFRegisterDefinition(struct adapter *Adapter)
pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBack = rFPGA0_XB_LSSIReadBack;
pHalData->PHYRegDef[RF_PATH_A].rfLSSIReadBackPi = TransceiverA_HSPI_Readback;
pHalData->PHYRegDef[RF_PATH_B].rfLSSIReadBackPi = TransceiverB_HSPI_Readback;
-
}
static int phy_BB8723b_Config_ParaFile(struct adapter *Adapter)
@@ -373,7 +363,6 @@ static int phy_BB8723b_Config_ParaFile(struct adapter *Adapter)
return _SUCCESS;
}
-
int PHY_BBConfig8723B(struct adapter *Adapter)
{
int rtStatus = _SUCCESS;
@@ -614,7 +603,6 @@ static void phy_PostSetBwMode8723B(struct adapter *Adapter)
u8 SubChnlNum = 0;
struct hal_com_data *pHalData = GET_HAL_DATA(Adapter);
-
/* 3 Set Reg668 Reg440 BW */
phy_SetRegBW_8723B(Adapter, pHalData->CurrentChannelBW);
@@ -725,13 +713,11 @@ static void PHY_HandleSwChnlAndSetBW8723B(
if (!pHalData->bSetChnlBW && !pHalData->bSwChnl)
return;
-
if (pHalData->bSwChnl) {
pHalData->CurrentChannel = ChannelNum;
pHalData->CurrentCenterFrequencyIndex1 = ChannelNum;
}
-
if (pHalData->bSetChnlBW) {
pHalData->CurrentChannelBW = ChnlWidth;
pHalData->nCur40MhzPrimeSC = ExtChnlOffsetOf40MHz;
--
2.53.0
next prev parent reply other threads:[~2026-04-08 10:32 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-08 10:32 [PATCH 0/3] staging: rtl8723bs: coding style cleanups for rtl8723b_phycfg.c osjin83
2026-04-08 10:32 ` [PATCH 1/3] staging: rtl8723bs: fix spacing around operators in rtl8723b_phycfg.c osjin83
2026-04-08 16:49 ` Luka Gejak
2026-04-08 10:32 ` [PATCH 2/3] staging: rtl8723bs: fix casting and alignment spacing " osjin83
2026-04-08 16:57 ` Luka Gejak
2026-04-08 10:32 ` osjin83 [this message]
2026-04-08 16:58 ` [PATCH 3/3] staging: rtl8723bs: remove unnecessary blank lines " Luka Gejak
2026-04-08 16:42 ` [PATCH 0/3] staging: rtl8723bs: coding style cleanups for rtl8723b_phycfg.c Luka Gejak
2026-04-08 17:00 ` Luka Gejak
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