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[90.182.112.124]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49e7ef735cesm65466155e9.6.2026.09.15.06.16.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Sep 2026 06:16:39 -0700 (PDT) Date: Tue, 15 Sep 2026 15:16:34 +0200 From: Joshua Crofts To: Abdelnasser Hussein Cc: jic23@kernel.org, gregkh@linuxfoundation.org, nuno.sa@analog.com, Michael.Hennerich@analog.com, dlechner@baylibre.com, andy@kernel.org, linux@analog.com, linux-iio@vger.kernel.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: Re: [PATCH v7 2/3] staging: iio: adc: ad7816: Serialize SPI operations Message-ID: <20260915151634.0000787e@gmail.com> In-Reply-To: <20260915075939.18180-3-abdelnasserhussein11@gmail.com> References: <20260915075939.18180-1-abdelnasserhussein11@gmail.com> <20260915075939.18180-3-abdelnasserhussein11@gmail.com> X-Mailer: Claws Mail 4.4.0 (GTK 3.24.51; x86_64-w64-mingw32) Precedence: bulk X-Mailing-List: linux-staging@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Tue, 15 Sep 2026 10:59:38 +0300 Abdelnasser Hussein wrote: ... > + ret = devm_mutex_init(&spi_dev->dev, &chip->lock); > + if (ret) > + return ret; > + > chip->spi_dev = spi_dev; > for (i = 0; i <= AD7816_CS_MAX; i++) > chip->oti_data[i] = 203; The patch in itself is fine, but Sashiko points out that the mutex could be added in the ad7816_store_mode/channel() functions. Nevertheless, this patch only focuses on SPI transfers so you could add guards to the GPIO functions in another patch (I don't think you need to send a v8 though, just another patch after this series gets merged). Does this newly added lock also need to be acquired in the sysfs store functions? If a userspace process concurrently writes to the mode or channel sysfs attributes, the GPIO pin and device state can be modified without acquiring chip->lock: drivers/staging/iio/adc/ad7816.c:ad7816_store_mode() { ... if (strcmp(buf, "full") == 0) { gpiod_set_value(chip->rdwr_pin, 1); chip->mode = AD7816_FULL; } else { ... } drivers/staging/iio/adc/ad7816.c:ad7816_store_channel() { ... chip->channel_id = data; ... } Could this concurrent access corrupt the rdwr_pin state, chip->mode, or chip->channel_id variables during an ongoing SPI transfer, leading to malformed transactions or corrupted ADC readings? -- Kind regards, Joshua Crofts