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Mon, 10 Jun 2024 05:00:35 -0400 (EDT) X-Mailer: MessagingEngine.com Webmail Interface User-Agent: Cyrus-JMAP/3.11.0-alpha0-497-g97f96844c-fm-20240526.001-g97f96844 Precedence: bulk X-Mailing-List: linux-staging@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-Id: <72a414e4-4cd0-4b12-a662-cb73d1e3515e@app.fastmail.com> In-Reply-To: References: <9d603d43-0f8a-4f9b-b11b-9e7543f421b9@app.fastmail.com> Date: Mon, 10 Jun 2024 11:00:12 +0200 From: "Arnd Bergmann" To: "Phil Elwell" Cc: "Stefan Wahren" , "Catalin Marinas" , "laurent.pinchart" , "Will Deacon" , "Christoph Hellwig" , "Florian Fainelli" , "Robin Murphy" , "Greg Kroah-Hartman" , "Linux ARM" , linux-staging@lists.linux.dev Subject: Re: WARNING: drivers/staging/vc04_services/interface/vchiq_arm/vchiq_arm.c:364 vchiq_prepare_bulk_data Content-Type: text/plain On Mon, Jun 10, 2024, at 10:26, Phil Elwell wrote: > On Mon, 10 Jun 2024 at 07:00, Arnd Bergmann wrote: > > Why is swiotlb involved at all? The DMA controller on BCM2837 can > access all RAM that is visible to the ARM cores. When a device is not cache-coherent and the buffer is not cache aligned, we now use swiotlb to avoid clobbering data in the same cache line during DMA synchronization. We used to rely on kmalloc() returning buffers that are cacheline aligned, but that was very expensive. Arnd