* [PATCH v4 1/3] staging: rtl8192e: rename tables in r8192e_hwimg.c
2022-11-06 8:31 [PATCH v4 0/3] staging: rtl8192e: trivial code cleanup patches Jacob Bai
@ 2022-11-06 8:31 ` Jacob Bai
2022-11-08 15:23 ` Greg KH
2022-11-06 8:31 ` [PATCH v4 2/3] staging: rtl8192e: rename r8192E_hwimg.c/h to table.c/h Jacob Bai
` (2 subsequent siblings)
3 siblings, 1 reply; 10+ messages in thread
From: Jacob Bai @ 2022-11-06 8:31 UTC (permalink / raw)
To: gregkh, linux-staging, linux-kernel
fix camel case issue.
Signed-off-by: Jacob Bai <jacob.bai.au@gmail.com>
---
.../staging/rtl8192e/rtl8192e/r8192E_hwimg.c | 18 +++++-----
.../staging/rtl8192e/rtl8192e/r8192E_hwimg.h | 36 +++++++++----------
.../staging/rtl8192e/rtl8192e/r8192E_phy.h | 36 +++++++++----------
3 files changed, 45 insertions(+), 45 deletions(-)
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.c
index e6fce749e65b..8920283f340e 100644
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.c
@@ -6,9 +6,9 @@
*/
#include "r8192E_hwimg.h"
-u32 Rtl8192PciEPHY_REGArray[PHY_REGArrayLengthPciE] = {0x0,};
+u32 RTL8192E_PHY_REG_ARRAY[RTL8192E_PHY_REG_ARRAY_LEN] = {0x0,};
-u32 Rtl8192PciEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPciE] = {
+u32 RTL8192E_PHY_REG_1T2R_ARRAY[RTL8192E_PHY_REG_1T2R_ARRAY_LEN] = {
0x800, 0x00000000,
0x804, 0x00000001,
0x808, 0x0000fc00,
@@ -159,7 +159,7 @@ u32 Rtl8192PciEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPciE] = {
0xe1c, 0x12121416,
};
-u32 Rtl8192PciERadioA_Array[RadioA_ArrayLengthPciE] = {
+u32 RTL8192E_RADIOA_ARRAY[RTL8192E_RADIOA_ARRAY_LEN] = {
0x019, 0x00000003,
0x000, 0x000000bf,
0x001, 0x00000ee0,
@@ -285,7 +285,7 @@ u32 Rtl8192PciERadioA_Array[RadioA_ArrayLengthPciE] = {
0x007, 0x00000700,
};
-u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE] = {
+u32 RTL8192E_RADIOB_ARRAY[RTL8192E_RADIOB_ARRAY_LEN] = {
0x019, 0x00000003,
0x000, 0x000000bf,
0x001, 0x000006e0,
@@ -327,13 +327,13 @@ u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE] = {
0x007, 0x00000700,
};
-u32 Rtl8192PciERadioC_Array[RadioC_ArrayLengthPciE] = {
+u32 RTL8192E_RADIOC_ARRAY[RTL8192E_RADIOC_ARRAY_LEN] = {
0x0, };
-u32 Rtl8192PciERadioD_Array[RadioD_ArrayLengthPciE] = {
+u32 RTL8192E_RADIOD_ARRAY[RTL8192E_RADIOD_ARRAY_LEN] = {
0x0, };
-u32 Rtl8192PciEMACPHY_Array[] = {
+u32 RTL8192E_MAC_ARRAY[RTL8192E_MAC_ARRAY_LEN] = {
0x03c, 0xffff0000, 0x00000f0f,
0x340, 0xffffffff, 0x161a1a1a,
0x344, 0xffffffff, 0x12121416,
@@ -342,7 +342,7 @@ u32 Rtl8192PciEMACPHY_Array[] = {
0x318, 0x00000fff, 0x00000100,
};
-u32 Rtl8192PciEMACPHY_Array_PG[] = {
+u32 RTL8192E_MAC_ARRAY_PG[RTL8192E_MAC_ARRAY_PG_LEN] = {
0x03c, 0xffff0000, 0x00000f0f,
0xe00, 0xffffffff, 0x06090909,
0xe04, 0xffffffff, 0x00030306,
@@ -355,7 +355,7 @@ u32 Rtl8192PciEMACPHY_Array_PG[] = {
0x318, 0x00000fff, 0x00000800,
};
-u32 Rtl8192PciEAGCTAB_Array[AGCTAB_ArrayLengthPciE] = {
+u32 RTL8192E_AGC_TAB_ARRAY[RTL8192E_AGC_TAB_ARRAY_LEN] = {
0xc78, 0x7d000001,
0xc78, 0x7d010001,
0xc78, 0x7d020001,
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.h
index 7d63f5a5c1b7..a436c089a779 100644
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_hwimg.h
@@ -11,23 +11,23 @@
#include <linux/types.h>
-#define PHY_REGArrayLengthPciE 1
-extern u32 Rtl8192PciEPHY_REGArray[PHY_REGArrayLengthPciE];
-#define PHY_REG_1T2RArrayLengthPciE 296
-extern u32 Rtl8192PciEPHY_REG_1T2RArray[PHY_REG_1T2RArrayLengthPciE];
-#define RadioA_ArrayLengthPciE 246
-extern u32 Rtl8192PciERadioA_Array[RadioA_ArrayLengthPciE];
-#define RadioB_ArrayLengthPciE 78
-extern u32 Rtl8192PciERadioB_Array[RadioB_ArrayLengthPciE];
-#define RadioC_ArrayLengthPciE 2
-extern u32 Rtl8192PciERadioC_Array[RadioC_ArrayLengthPciE];
-#define RadioD_ArrayLengthPciE 2
-extern u32 Rtl8192PciERadioD_Array[RadioD_ArrayLengthPciE];
-#define MACPHY_ArrayLengthPciE 18
-extern u32 Rtl8192PciEMACPHY_Array[MACPHY_ArrayLengthPciE];
-#define MACPHY_Array_PGLengthPciE 30
-extern u32 Rtl8192PciEMACPHY_Array_PG[MACPHY_Array_PGLengthPciE];
-#define AGCTAB_ArrayLengthPciE 384
-extern u32 Rtl8192PciEAGCTAB_Array[AGCTAB_ArrayLengthPciE];
+#define RTL8192E_PHY_REG_ARRAY_LEN 1
+extern u32 RTL8192E_PHY_REG_ARRAY[RTL8192E_PHY_REG_ARRAY_LEN];
+#define RTL8192E_PHY_REG_1T2R_ARRAY_LEN 296
+extern u32 RTL8192E_PHY_REG_1T2R_ARRAY[RTL8192E_PHY_REG_1T2R_ARRAY_LEN];
+#define RTL8192E_RADIOA_ARRAY_LEN 246
+extern u32 RTL8192E_RADIOA_ARRAY[RTL8192E_RADIOA_ARRAY_LEN];
+#define RTL8192E_RADIOB_ARRAY_LEN 78
+extern u32 RTL8192E_RADIOB_ARRAY[RTL8192E_RADIOB_ARRAY_LEN];
+#define RTL8192E_RADIOC_ARRAY_LEN 2
+extern u32 RTL8192E_RADIOC_ARRAY[RTL8192E_RADIOC_ARRAY_LEN];
+#define RTL8192E_RADIOD_ARRAY_LEN 2
+extern u32 RTL8192E_RADIOD_ARRAY[RTL8192E_RADIOD_ARRAY_LEN];
+#define RTL8192E_MAC_ARRAY_LEN 18
+extern u32 RTL8192E_MAC_ARRAY[RTL8192E_MAC_ARRAY_LEN];
+#define RTL8192E_MAC_ARRAY_PG_LEN 30
+extern u32 RTL8192E_MAC_ARRAY_PG[RTL8192E_MAC_ARRAY_PG_LEN];
+#define RTL8192E_AGC_TAB_ARRAY_LEN 384
+extern u32 RTL8192E_AGC_TAB_ARRAY[RTL8192E_AGC_TAB_ARRAY_LEN];
#endif
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
index 75629f5df954..e1c1f19b71a3 100644
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
@@ -9,25 +9,25 @@
#define MAX_DOZE_WAITING_TIMES_9x 64
-#define AGCTAB_ArrayLength AGCTAB_ArrayLengthPciE
-#define MACPHY_ArrayLength MACPHY_ArrayLengthPciE
-#define RadioA_ArrayLength RadioA_ArrayLengthPciE
-#define RadioB_ArrayLength RadioB_ArrayLengthPciE
-#define MACPHY_Array_PGLength MACPHY_Array_PGLengthPciE
-#define RadioC_ArrayLength RadioC_ArrayLengthPciE
-#define RadioD_ArrayLength RadioD_ArrayLengthPciE
-#define PHY_REGArrayLength PHY_REGArrayLengthPciE
-#define PHY_REG_1T2RArrayLength PHY_REG_1T2RArrayLengthPciE
+#define AGCTAB_ArrayLength RTL8192E_AGC_TAB_ARRAY_LEN
+#define MACPHY_ArrayLength RTL8192E_MAC_ARRAY_LEN
+#define RadioA_ArrayLength RTL8192E_RADIOA_ARRAY_LEN
+#define RadioB_ArrayLength RTL8192E_RADIOB_ARRAY_LEN
+#define MACPHY_Array_PGLength RTL8192E_MAC_ARRAY_PG_LEN
+#define RadioC_ArrayLength RTL8192E_RADIOC_ARRAY_LEN
+#define RadioD_ArrayLength RTL8192E_RADIOD_ARRAY_LEN
+#define PHY_REGArrayLength RTL8192E_PHY_REG_ARRAY_LEN
+#define PHY_REG_1T2RArrayLength RTL8192E_PHY_REG_1T2R_ARRAY_LEN
-#define Rtl819XMACPHY_Array_PG Rtl8192PciEMACPHY_Array_PG
-#define Rtl819XMACPHY_Array Rtl8192PciEMACPHY_Array
-#define Rtl819XRadioA_Array Rtl8192PciERadioA_Array
-#define Rtl819XRadioB_Array Rtl8192PciERadioB_Array
-#define Rtl819XRadioC_Array Rtl8192PciERadioC_Array
-#define Rtl819XRadioD_Array Rtl8192PciERadioD_Array
-#define Rtl819XAGCTAB_Array Rtl8192PciEAGCTAB_Array
-#define Rtl819XPHY_REGArray Rtl8192PciEPHY_REGArray
-#define Rtl819XPHY_REG_1T2RArray Rtl8192PciEPHY_REG_1T2RArray
+#define Rtl819XMACPHY_Array_PG RTL8192E_MAC_ARRAY_PG
+#define Rtl819XMACPHY_Array RTL8192E_MAC_ARRAY
+#define Rtl819XRadioA_Array RTL8192E_RADIOA_ARRAY
+#define Rtl819XRadioB_Array RTL8192E_RADIOB_ARRAY
+#define Rtl819XRadioC_Array RTL8192E_RADIOC_ARRAY
+#define Rtl819XRadioD_Array RTL8192E_RADIOD_ARRAY
+#define Rtl819XAGCTAB_Array RTL8192E_AGC_TAB_ARRAY
+#define Rtl819XPHY_REGArray RTL8192E_PHY_REG_ARRAY
+#define Rtl819XPHY_REG_1T2RArray RTL8192E_PHY_REG_1T2R_ARRAY
extern u32 rtl819XAGCTAB_Array[];
--
2.34.1
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v4 3/3] staging: rtl8192e: replace macro defines with ARRAY_SIZE
2022-11-06 8:31 [PATCH v4 0/3] staging: rtl8192e: trivial code cleanup patches Jacob Bai
2022-11-06 8:31 ` [PATCH v4 1/3] staging: rtl8192e: rename tables in r8192e_hwimg.c Jacob Bai
2022-11-06 8:31 ` [PATCH v4 2/3] staging: rtl8192e: rename r8192E_hwimg.c/h to table.c/h Jacob Bai
@ 2022-11-06 8:31 ` Jacob Bai
2022-11-08 15:24 ` Greg KH
2022-11-06 8:41 ` [PATCH v4 0/3] staging: rtl8192e: trivial code cleanup patches Philipp Hortmann
3 siblings, 1 reply; 10+ messages in thread
From: Jacob Bai @ 2022-11-06 8:31 UTC (permalink / raw)
To: gregkh, linux-staging, linux-kernel
use ARRAY_SIZE() to replace macro defines
Signed-off-by: Jacob Bai <jacob.bai.au@gmail.com>
---
.../staging/rtl8192e/rtl8192e/r8192E_phy.c | 52 +++++++++----------
.../staging/rtl8192e/rtl8192e/r8192E_phy.h | 20 -------
drivers/staging/rtl8192e/rtl8192e/table.c | 32 ++++++++----
drivers/staging/rtl8192e/rtl8192e/table.h | 36 ++++++-------
4 files changed, 65 insertions(+), 75 deletions(-)
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
index eabb4187d907..aad1842857c0 100644
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.c
@@ -307,12 +307,12 @@ void rtl92e_config_mac(struct net_device *dev)
struct r8192_priv *priv = rtllib_priv(dev);
if (priv->bTXPowerDataReadFromEEPORM) {
- dwArrayLen = MACPHY_Array_PGLength;
- pdwArray = Rtl819XMACPHY_Array_PG;
+ dwArrayLen = RTL8192E_MAC_ARRAY_PG_LEN;
+ pdwArray = RTL8192E_MAC_ARRAY_PG;
} else {
- dwArrayLen = MACPHY_ArrayLength;
- pdwArray = Rtl819XMACPHY_Array;
+ dwArrayLen = RTL8192E_MAC_ARRAY_LEN;
+ pdwArray = RTL8192E_MAC_ARRAY;
}
for (i = 0; i < dwArrayLen; i += 3) {
if (pdwArray[i] == 0x318)
@@ -332,14 +332,14 @@ static void _rtl92e_phy_config_bb(struct net_device *dev, u8 ConfigType)
u16 AGCTAB_ArrayLen, PHY_REGArrayLen = 0;
struct r8192_priv *priv = rtllib_priv(dev);
- AGCTAB_ArrayLen = AGCTAB_ArrayLength;
- Rtl819XAGCTAB_Array_Table = Rtl819XAGCTAB_Array;
+ AGCTAB_ArrayLen = RTL8192E_AGC_TAB_ARRAY_LEN;
+ Rtl819XAGCTAB_Array_Table = RTL8192E_AGC_TAB_ARRAY;
if (priv->rf_type == RF_2T4R) {
- PHY_REGArrayLen = PHY_REGArrayLength;
- Rtl819XPHY_REGArray_Table = Rtl819XPHY_REGArray;
+ PHY_REGArrayLen = RTL8192E_PHY_REG_ARRAY_LEN;
+ Rtl819XPHY_REGArray_Table = RTL8192E_PHY_REG_ARRAY;
} else if (priv->rf_type == RF_1T2R) {
- PHY_REGArrayLen = PHY_REG_1T2RArrayLength;
- Rtl819XPHY_REGArray_Table = Rtl819XPHY_REG_1T2RArray;
+ PHY_REGArrayLen = RTL8192E_PHY_REG_1T2R_ARRAY_LEN;
+ Rtl819XPHY_REGArray_Table = RTL8192E_PHY_REG_1T2R_ARRAY;
}
if (ConfigType == BaseBand_Config_PHY_REG) {
@@ -668,50 +668,50 @@ u8 rtl92e_config_rf_path(struct net_device *dev, enum rf90_radio_path eRFPath)
switch (eRFPath) {
case RF90_PATH_A:
- for (i = 0; i < RadioA_ArrayLength; i += 2) {
- if (Rtl819XRadioA_Array[i] == 0xfe) {
+ for (i = 0; i < RTL8192E_RADIOA_ARRAY_LEN; i += 2) {
+ if (RTL8192E_RADIOA_ARRAY[i] == 0xfe) {
msleep(100);
continue;
}
- rtl92e_set_rf_reg(dev, eRFPath, Rtl819XRadioA_Array[i],
+ rtl92e_set_rf_reg(dev, eRFPath, RTL8192E_RADIOA_ARRAY[i],
bMask12Bits,
- Rtl819XRadioA_Array[i+1]);
+ RTL8192E_RADIOA_ARRAY[i+1]);
}
break;
case RF90_PATH_B:
- for (i = 0; i < RadioB_ArrayLength; i += 2) {
- if (Rtl819XRadioB_Array[i] == 0xfe) {
+ for (i = 0; i < RTL8192E_RADIOB_ARRAY_LEN; i += 2) {
+ if (RTL8192E_RADIOB_ARRAY[i] == 0xfe) {
msleep(100);
continue;
}
- rtl92e_set_rf_reg(dev, eRFPath, Rtl819XRadioB_Array[i],
+ rtl92e_set_rf_reg(dev, eRFPath, RTL8192E_RADIOB_ARRAY[i],
bMask12Bits,
- Rtl819XRadioB_Array[i+1]);
+ RTL8192E_RADIOB_ARRAY[i+1]);
}
break;
case RF90_PATH_C:
- for (i = 0; i < RadioC_ArrayLength; i += 2) {
- if (Rtl819XRadioC_Array[i] == 0xfe) {
+ for (i = 0; i < RTL8192E_RADIOC_ARRAY_LEN; i += 2) {
+ if (RTL8192E_RADIOC_ARRAY[i] == 0xfe) {
msleep(100);
continue;
}
- rtl92e_set_rf_reg(dev, eRFPath, Rtl819XRadioC_Array[i],
+ rtl92e_set_rf_reg(dev, eRFPath, RTL8192E_RADIOC_ARRAY[i],
bMask12Bits,
- Rtl819XRadioC_Array[i+1]);
+ RTL8192E_RADIOC_ARRAY[i+1]);
}
break;
case RF90_PATH_D:
- for (i = 0; i < RadioD_ArrayLength; i += 2) {
- if (Rtl819XRadioD_Array[i] == 0xfe) {
+ for (i = 0; i < RTL8192E_RADIOD_ARRAY_LEN; i += 2) {
+ if (RTL8192E_RADIOD_ARRAY[i] == 0xfe) {
msleep(100);
continue;
}
- rtl92e_set_rf_reg(dev, eRFPath, Rtl819XRadioD_Array[i],
+ rtl92e_set_rf_reg(dev, eRFPath, RTL8192E_RADIOD_ARRAY[i],
bMask12Bits,
- Rtl819XRadioD_Array[i+1]);
+ RTL8192E_RADIOD_ARRAY[i+1]);
}
break;
diff --git a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
index e1c1f19b71a3..5e6527e835db 100644
--- a/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
+++ b/drivers/staging/rtl8192e/rtl8192e/r8192E_phy.h
@@ -9,26 +9,6 @@
#define MAX_DOZE_WAITING_TIMES_9x 64
-#define AGCTAB_ArrayLength RTL8192E_AGC_TAB_ARRAY_LEN
-#define MACPHY_ArrayLength RTL8192E_MAC_ARRAY_LEN
-#define RadioA_ArrayLength RTL8192E_RADIOA_ARRAY_LEN
-#define RadioB_ArrayLength RTL8192E_RADIOB_ARRAY_LEN
-#define MACPHY_Array_PGLength RTL8192E_MAC_ARRAY_PG_LEN
-#define RadioC_ArrayLength RTL8192E_RADIOC_ARRAY_LEN
-#define RadioD_ArrayLength RTL8192E_RADIOD_ARRAY_LEN
-#define PHY_REGArrayLength RTL8192E_PHY_REG_ARRAY_LEN
-#define PHY_REG_1T2RArrayLength RTL8192E_PHY_REG_1T2R_ARRAY_LEN
-
-#define Rtl819XMACPHY_Array_PG RTL8192E_MAC_ARRAY_PG
-#define Rtl819XMACPHY_Array RTL8192E_MAC_ARRAY
-#define Rtl819XRadioA_Array RTL8192E_RADIOA_ARRAY
-#define Rtl819XRadioB_Array RTL8192E_RADIOB_ARRAY
-#define Rtl819XRadioC_Array RTL8192E_RADIOC_ARRAY
-#define Rtl819XRadioD_Array RTL8192E_RADIOD_ARRAY
-#define Rtl819XAGCTAB_Array RTL8192E_AGC_TAB_ARRAY
-#define Rtl819XPHY_REGArray RTL8192E_PHY_REG_ARRAY
-#define Rtl819XPHY_REG_1T2RArray RTL8192E_PHY_REG_1T2R_ARRAY
-
extern u32 rtl819XAGCTAB_Array[];
enum hw90_block {
diff --git a/drivers/staging/rtl8192e/rtl8192e/table.c b/drivers/staging/rtl8192e/rtl8192e/table.c
index 2e75f40db874..936f2ea180cd 100644
--- a/drivers/staging/rtl8192e/rtl8192e/table.c
+++ b/drivers/staging/rtl8192e/rtl8192e/table.c
@@ -4,11 +4,13 @@
*
* Contact Information: wlanfae <wlanfae@realtek.com>
*/
+#include <linux/kernel.h>
#include "table.h"
-u32 RTL8192E_PHY_REG_ARRAY[RTL8192E_PHY_REG_ARRAY_LEN] = {0x0,};
+u32 RTL8192E_PHY_REG_ARRAY[] = {0x0,};
+u32 RTL8192E_PHY_REG_ARRAY_LEN = ARRAY_SIZE(RTL8192E_PHY_REG_ARRAY);
-u32 RTL8192E_PHY_REG_1T2R_ARRAY[RTL8192E_PHY_REG_1T2R_ARRAY_LEN] = {
+u32 RTL8192E_PHY_REG_1T2R_ARRAY[] = {
0x800, 0x00000000,
0x804, 0x00000001,
0x808, 0x0000fc00,
@@ -158,8 +160,9 @@ u32 RTL8192E_PHY_REG_1T2R_ARRAY[RTL8192E_PHY_REG_1T2R_ARRAY_LEN] = {
0xe18, 0x161a1a1a,
0xe1c, 0x12121416,
};
+u32 RTL8192E_PHY_REG_1T2R_ARRAY_LEN = ARRAY_SIZE(RTL8192E_PHY_REG_1T2R_ARRAY);
-u32 RTL8192E_RADIOA_ARRAY[RTL8192E_RADIOA_ARRAY_LEN] = {
+u32 RTL8192E_RADIOA_ARRAY[] = {
0x019, 0x00000003,
0x000, 0x000000bf,
0x001, 0x00000ee0,
@@ -284,8 +287,9 @@ u32 RTL8192E_RADIOA_ARRAY[RTL8192E_RADIOA_ARRAY_LEN] = {
0x004, 0x00000975,
0x007, 0x00000700,
};
+u32 RTL8192E_RADIOA_ARRAY_LEN = ARRAY_SIZE(RTL8192E_RADIOA_ARRAY);
-u32 RTL8192E_RADIOB_ARRAY[RTL8192E_RADIOB_ARRAY_LEN] = {
+u32 RTL8192E_RADIOB_ARRAY[] = {
0x019, 0x00000003,
0x000, 0x000000bf,
0x001, 0x000006e0,
@@ -326,14 +330,17 @@ u32 RTL8192E_RADIOB_ARRAY[RTL8192E_RADIOB_ARRAY_LEN] = {
0x004, 0x00000975,
0x007, 0x00000700,
};
+u32 RTL8192E_RADIOB_ARRAY_LEN = ARRAY_SIZE(RTL8192E_RADIOB_ARRAY);
-u32 RTL8192E_RADIOC_ARRAY[RTL8192E_RADIOC_ARRAY_LEN] = {
- 0x0, };
+u32 RTL8192E_RADIOC_ARRAY[] = {
+ 0x0, 0x0 };
+u32 RTL8192E_RADIOC_ARRAY_LEN = ARRAY_SIZE(RTL8192E_RADIOC_ARRAY);
-u32 RTL8192E_RADIOD_ARRAY[RTL8192E_RADIOD_ARRAY_LEN] = {
- 0x0, };
+u32 RTL8192E_RADIOD_ARRAY[] = {
+ 0x0, 0x0 };
+u32 RTL8192E_RADIOD_ARRAY_LEN = ARRAY_SIZE(RTL8192E_RADIOD_ARRAY);
-u32 RTL8192E_MAC_ARRAY[RTL8192E_MAC_ARRAY_LEN] = {
+u32 RTL8192E_MAC_ARRAY[] = {
0x03c, 0xffff0000, 0x00000f0f,
0x340, 0xffffffff, 0x161a1a1a,
0x344, 0xffffffff, 0x12121416,
@@ -341,8 +348,9 @@ u32 RTL8192E_MAC_ARRAY[RTL8192E_MAC_ARRAY_LEN] = {
0x12c, 0xffffffff, 0x04000802,
0x318, 0x00000fff, 0x00000100,
};
+u32 RTL8192E_MAC_ARRAY_LEN = ARRAY_SIZE(RTL8192E_MAC_ARRAY);
-u32 RTL8192E_MAC_ARRAY_PG[RTL8192E_MAC_ARRAY_PG_LEN] = {
+u32 RTL8192E_MAC_ARRAY_PG[] = {
0x03c, 0xffff0000, 0x00000f0f,
0xe00, 0xffffffff, 0x06090909,
0xe04, 0xffffffff, 0x00030306,
@@ -354,8 +362,9 @@ u32 RTL8192E_MAC_ARRAY_PG[RTL8192E_MAC_ARRAY_PG_LEN] = {
0x12c, 0xffffffff, 0x04000802,
0x318, 0x00000fff, 0x00000800,
};
+u32 RTL8192E_MAC_ARRAY_PG_LEN = ARRAY_SIZE(RTL8192E_MAC_ARRAY_PG);
-u32 RTL8192E_AGC_TAB_ARRAY[RTL8192E_AGC_TAB_ARRAY_LEN] = {
+u32 RTL8192E_AGC_TAB_ARRAY[] = {
0xc78, 0x7d000001,
0xc78, 0x7d010001,
0xc78, 0x7d020001,
@@ -549,3 +558,4 @@ u32 RTL8192E_AGC_TAB_ARRAY[RTL8192E_AGC_TAB_ARRAY_LEN] = {
0xc78, 0x693e001e,
0xc78, 0x6a3f001e,
};
+u32 RTL8192E_AGC_TAB_ARRAY_LEN = ARRAY_SIZE(RTL8192E_AGC_TAB_ARRAY);
diff --git a/drivers/staging/rtl8192e/rtl8192e/table.h b/drivers/staging/rtl8192e/rtl8192e/table.h
index a80176c47127..233beeec3e65 100644
--- a/drivers/staging/rtl8192e/rtl8192e/table.h
+++ b/drivers/staging/rtl8192e/rtl8192e/table.h
@@ -11,23 +11,23 @@
#include <linux/types.h>
-#define RTL8192E_PHY_REG_ARRAY_LEN 1
-extern u32 RTL8192E_PHY_REG_ARRAY[RTL8192E_PHY_REG_ARRAY_LEN];
-#define RTL8192E_PHY_REG_1T2R_ARRAY_LEN 296
-extern u32 RTL8192E_PHY_REG_1T2R_ARRAY[RTL8192E_PHY_REG_1T2R_ARRAY_LEN];
-#define RTL8192E_RADIOA_ARRAY_LEN 246
-extern u32 RTL8192E_RADIOA_ARRAY[RTL8192E_RADIOA_ARRAY_LEN];
-#define RTL8192E_RADIOB_ARRAY_LEN 78
-extern u32 RTL8192E_RADIOB_ARRAY[RTL8192E_RADIOB_ARRAY_LEN];
-#define RTL8192E_RADIOC_ARRAY_LEN 2
-extern u32 RTL8192E_RADIOC_ARRAY[RTL8192E_RADIOC_ARRAY_LEN];
-#define RTL8192E_RADIOD_ARRAY_LEN 2
-extern u32 RTL8192E_RADIOD_ARRAY[RTL8192E_RADIOD_ARRAY_LEN];
-#define RTL8192E_MAC_ARRAY_LEN 18
-extern u32 RTL8192E_MAC_ARRAY[RTL8192E_MAC_ARRAY_LEN];
-#define RTL8192E_MAC_ARRAY_PG_LEN 30
-extern u32 RTL8192E_MAC_ARRAY_PG[RTL8192E_MAC_ARRAY_PG_LEN];
-#define RTL8192E_AGC_TAB_ARRAY_LEN 384
-extern u32 RTL8192E_AGC_TAB_ARRAY[RTL8192E_AGC_TAB_ARRAY_LEN];
+extern u32 RTL8192E_PHY_REG_ARRAY_LEN;
+extern u32 RTL8192E_PHY_REG_ARRAY[];
+extern u32 RTL8192E_PHY_REG_1T2R_ARRAY_LEN;
+extern u32 RTL8192E_PHY_REG_1T2R_ARRAY[];
+extern u32 RTL8192E_RADIOA_ARRAY_LEN;
+extern u32 RTL8192E_RADIOA_ARRAY[];
+extern u32 RTL8192E_RADIOB_ARRAY_LEN;
+extern u32 RTL8192E_RADIOB_ARRAY[];
+extern u32 RTL8192E_RADIOC_ARRAY_LEN;
+extern u32 RTL8192E_RADIOC_ARRAY[];
+extern u32 RTL8192E_RADIOD_ARRAY_LEN;
+extern u32 RTL8192E_RADIOD_ARRAY[];
+extern u32 RTL8192E_MAC_ARRAY_LEN;
+extern u32 RTL8192E_MAC_ARRAY[];
+extern u32 RTL8192E_MAC_ARRAY_PG_LEN;
+extern u32 RTL8192E_MAC_ARRAY_PG[];
+extern u32 RTL8192E_AGC_TAB_ARRAY_LEN;
+extern u32 RTL8192E_AGC_TAB_ARRAY[];
#endif
--
2.34.1
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