From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-oa1-f42.google.com (mail-oa1-f42.google.com [209.85.160.42]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id E74373204 for ; Tue, 3 May 2022 14:48:44 +0000 (UTC) Received: by mail-oa1-f42.google.com with SMTP id 586e51a60fabf-e2fa360f6dso17415676fac.2 for ; Tue, 03 May 2022 07:48:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=vanguardiasur-com-ar.20210112.gappssmtp.com; s=20210112; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to; bh=BV1kdgg88h2dApOYl3eT3CssciiSPlxmubonwKG/mW4=; b=Vx/Eytelo3ZiPPIy6BcMf32X6UZdSEmR2nLRg7aKVjYWa7pjN6x+UjOE23jnBGqj9p FfpfY/XBM2izLWMN0zBVjzfA1nOFDXyofVQlbQQJPYLs37IFoQgPFvTmSB5CDRmtClm1 pOUI23aiupAropgM3Gl6CubKEvmi+klBwX9WT/1/4FpSMSSeWyGTYO6Y335hCKOvxLWz Ez5GYoCEp90H2hIEn7+7gw1w8Dg9eqdYPK0LCWpq4IL2h7oK67NZMxxVCeLPWyvBBtmE L0+ootPlnamYUz5j9A//vbWoR2OGnh8whYJOFapzsjAQsN52HkmzMegDRaB4xKM6qZee 2uPQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to; bh=BV1kdgg88h2dApOYl3eT3CssciiSPlxmubonwKG/mW4=; b=eCAqG9vs4K0TzbJ1m8ToYb/mAp8rj8/Yqhd4xOJUgufz5KVC1alCmdPQwt/RewPWRq O37vIrRl+kJz0rwSJIbdh8wdTQV/BeSSQmlURHs9XB5UcqgQWmDlDT0s0dhdf522qSWy rJuIFo3KZsEQcEfk/HwaVX8fkME2f00W5DOTh9/vhL4PNqT6DbhtKHPgjl9IYSnkHabZ Fx9vxScfZlXQ42Wrrtp/0dci8ufI35Zu4a2crFjVcfZw9b27lzwIPMBuRJIXaBWScKNK lA8H100JXxv/rqtrerimKpkr9IcU3TPCyxbPOXgm3rbANCZ8V6Y+soDB/G6AQ7Es2a/0 pX6A== X-Gm-Message-State: AOAM532uS81CuLE8cEG8xuPS/XCKPaNfnbNZUOni1f3DQiZq6ZoZT5+A yo+c+r3OqVpeOL5zUckuooJysw== X-Google-Smtp-Source: ABdhPJygheLeJdTY7mT0oFr+XZcbBbO/9r9tZYoCSHRNY4qLm/p0Vf9K92aaEDaOY9HSjhTd/4OnKA== X-Received: by 2002:a05:6870:d186:b0:ed:a737:8ae4 with SMTP id a6-20020a056870d18600b000eda7378ae4mr1832370oac.25.1651589324016; Tue, 03 May 2022 07:48:44 -0700 (PDT) Received: from eze-laptop ([2803:9800:98c2:8470:9f4:8e2a:88e5:ec01]) by smtp.gmail.com with ESMTPSA id d11-20020a0568301b6b00b0060603221265sm4045559ote.53.2022.05.03.07.48.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 May 2022 07:48:43 -0700 (PDT) Date: Tue, 3 May 2022 11:48:37 -0300 From: Ezequiel Garcia To: Benjamin Gaignard Cc: p.zabel@pengutronix.de, mchehab@kernel.org, gregkh@linuxfoundation.org, linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org, jon@nanocrew.net, aford173@gmail.com, kernel@collabora.com Subject: Re: [PATCH v3] media: hantro: HEVC: unconditionnaly set pps_{cb/cr}_qp_offset values Message-ID: References: <20220503135529.683474-1-benjamin.gaignard@collabora.com> Precedence: bulk X-Mailing-List: linux-staging@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220503135529.683474-1-benjamin.gaignard@collabora.com> On Tue, May 03, 2022 at 03:55:29PM +0200, Benjamin Gaignard wrote: > Always set pps_cb_qp_offset and pps_cr_qp_offset values in Hantro/G2 > register whatever is V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT > flag value. > The vendor code does the case to set these values. s/case/same > This fix conformance test CAINIT_G_SHARP_3. > > Fluster HEVC score is increase by one with this patch. > Saying "score is increased by one" is not all that useful. I still believe seeing the Fluster score would be adding real information. The score you have without this patch, and using upstream GStreamer is the "current" score. Then the score you get with the patch applied, is the score you get after the fix. And this is actually good as you would also give more information by clarifying the score is the result of GStreamer (commit $sha) plus Linux. > Signed-off-by: Benjamin Gaignard Patch looks fine, but I believe you still have some challenges on the commit descriptions, and so we iterate a lot on them. How about you proof-read them first (or you ask colleagues to proof-read them)? A useful tip I've profit from is to let patches sit for a few days, then re-read and amend the commit before sending them. Reviewed-by: Ezequiel Garcia Thanks! Ezequiel > --- > drivers/staging/media/hantro/hantro_g2_hevc_dec.c | 9 ++------- > 1 file changed, 2 insertions(+), 7 deletions(-) > > diff --git a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c > index 6deb31b7b993..503f4b028bc5 100644 > --- a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c > +++ b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c > @@ -194,13 +194,8 @@ static void set_params(struct hantro_ctx *ctx) > hantro_reg_write(vpu, &g2_max_cu_qpd_depth, 0); > } > > - if (pps->flags & V4L2_HEVC_PPS_FLAG_PPS_SLICE_CHROMA_QP_OFFSETS_PRESENT) { > - hantro_reg_write(vpu, &g2_cb_qp_offset, pps->pps_cb_qp_offset); > - hantro_reg_write(vpu, &g2_cr_qp_offset, pps->pps_cr_qp_offset); > - } else { > - hantro_reg_write(vpu, &g2_cb_qp_offset, 0); > - hantro_reg_write(vpu, &g2_cr_qp_offset, 0); > - } > + hantro_reg_write(vpu, &g2_cb_qp_offset, pps->pps_cb_qp_offset); > + hantro_reg_write(vpu, &g2_cr_qp_offset, pps->pps_cr_qp_offset); > > hantro_reg_write(vpu, &g2_filt_offset_beta, pps->pps_beta_offset_div2); > hantro_reg_write(vpu, &g2_filt_offset_tc, pps->pps_tc_offset_div2); > -- > 2.32.0 >