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[142.113.132.114]) by smtp.gmail.com with ESMTPSA id u3-20020a372e03000000b006a323e60e29sm19032378qkh.135.2022.06.09.12.39.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Jun 2022 12:39:54 -0700 (PDT) Date: Thu, 9 Jun 2022 15:39:53 -0400 From: Srivathsan Sivakumar To: Dan Carpenter Cc: Manish Chopra , GR-Linux-NIC-Dev@marvell.com, Coiby Xu , Greg Kroah-Hartman , netdev@vger.kernel.org, linux-staging@lists.linux.dev, linux-kernel@vger.kernel.org Subject: [PATCH] staging: qlge: qlge_main.c: convert do-while loops to for loops Message-ID: References: <20220609152653.GZ2146@kadam> <20220609183419.GZ2168@kadam> Precedence: bulk X-Mailing-List: linux-staging@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220609183419.GZ2168@kadam> On Thu, Jun 09, 2022 at 09:34:19PM +0300, Dan Carpenter wrote: > On Thu, Jun 09, 2022 at 01:01:27PM -0400, Srivathsan Sivakumar wrote: > > On Thu, Jun 09, 2022 at 06:26:53PM +0300, Dan Carpenter wrote: > > > On Thu, Jun 09, 2022 at 11:15:51AM -0400, Srivathsan Sivakumar wrote: > > > > diff --git a/drivers/staging/qlge/qlge_main.c b/drivers/staging/qlge/qlge_main.c > > > > index 8c35d4c4b851..308e8b621185 100644 > > > > --- a/drivers/staging/qlge/qlge_main.c > > > > +++ b/drivers/staging/qlge/qlge_main.c > > > > @@ -3006,13 +3006,13 @@ static int qlge_start_rx_ring(struct qlge_adapter *qdev, struct rx_ring *rx_ring > > > > cqicb->flags |= FLAGS_LL; /* Load lbq values */ > > > > tmp = (u64)rx_ring->lbq.base_dma; > > > > base_indirect_ptr = rx_ring->lbq.base_indirect; > > > > - page_entries = 0; > > > > - do { > > > > - *base_indirect_ptr = cpu_to_le64(tmp); > > > > - tmp += DB_PAGE_SIZE; > > > > - base_indirect_ptr++; > > > > - page_entries++; > > > > - } while (page_entries < MAX_DB_PAGES_PER_BQ(QLGE_BQ_LEN)); > > > > + > > > > + for (page_entries = 0; page_entries < > > > > + MAX_DB_PAGES_PER_BQ(QLGE_BQ_LEN); page_entries++) { > > > > + *base_indirect_ptr = cpu_to_le64(tmp); > > > > + tmp += DB_PAGE_SIZE; > > > > + base_indirect_ptr++; > > > > + } > > > > > > It's better than the original, but wouldn't it be better yet to write > > > something like this (untested): > > > > > > for (i = 0; i < MAX_DB_PAGES_PER_BQ(QLGE_BQ_LEN); i++) > > > base_indirect_ptr[i] = cpu_to_le64(tmp + (i * DB_PAGE_SIZE)); > > > > > > Same with the other as well, obviously. > > > > > > regards, > > > dan carpenter > > > > > > > Hello Dan, > > > > Thanks for your input > > > > wouldn't base_indirect_ptr point at a different endian value if tmp is > > added with (i * DB_PAGE_SIZE)? > > tmp is cpu endian so we can do math on it. Then we convert the result > to le64. This is how it works before and after. What isn't allowed > (doesn't make sense) is to do math on endian data so "cpu_to_le64(tmp) + > i * DB_PAGE_SIZE" is wrong. > > Sparse can detect endian bugs like that: > https://lwn.net/Articles/205624/ > > regards, > dan carpenter > I understand now, I'll send the revised patch soon thanks, Srivathsan