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Thu, 30 Jun 2022 10:35:06 -0700 (PDT) Date: Thu, 30 Jun 2022 14:35:00 -0300 From: Ezequiel Garcia To: Benjamin Gaignard Cc: mchehab@kernel.org, hverkuil@xs4all.nl, p.zabel@pengutronix.de, gregkh@linuxfoundation.org, mripard@kernel.org, paul.kocialkowski@bootlin.com, wens@csie.org, jernej.skrabec@gmail.com, samuel@sholland.org, nicolas.dufresne@collabora.com, andrzej.p@collabora.com, linux-media@vger.kernel.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, linux-staging@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, kernel@collabora.com Subject: Re: [PATCH 4/7] media: hantro: postproc: Configure output regs to support 10bit Message-ID: References: <20220617115802.396442-1-benjamin.gaignard@collabora.com> <20220617115802.396442-5-benjamin.gaignard@collabora.com> Precedence: bulk X-Mailing-List: linux-staging@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220617115802.396442-5-benjamin.gaignard@collabora.com> Hi Benjamin, On Fri, Jun 17, 2022 at 01:57:59PM +0200, Benjamin Gaignard wrote: > Move output format setting in postproc and make sure that > 8/10bit configuration is correctly set. > > Signed-off-by: Benjamin Gaignard Reviewed-by: Ezequiel Garcia Thanks, Ezequiel > --- > drivers/staging/media/hantro/hantro_g2_hevc_dec.c | 2 -- > drivers/staging/media/hantro/hantro_postproc.c | 7 ++++++- > 2 files changed, 6 insertions(+), 3 deletions(-) > > diff --git a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c > index 8407ad45b7b7..c929f2974a01 100644 > --- a/drivers/staging/media/hantro/hantro_g2_hevc_dec.c > +++ b/drivers/staging/media/hantro/hantro_g2_hevc_dec.c > @@ -167,8 +167,6 @@ static void set_params(struct hantro_ctx *ctx) > hantro_reg_write(vpu, &g2_bit_depth_y_minus8, sps->bit_depth_luma_minus8); > hantro_reg_write(vpu, &g2_bit_depth_c_minus8, sps->bit_depth_chroma_minus8); > > - hantro_reg_write(vpu, &g2_output_8_bits, 0); > - > hantro_reg_write(vpu, &g2_hdr_skip_length, compute_header_skip_lenght(ctx)); > > min_log2_cb_size = sps->log2_min_luma_coding_block_size_minus3 + 3; > diff --git a/drivers/staging/media/hantro/hantro_postproc.c b/drivers/staging/media/hantro/hantro_postproc.c > index a0928c508434..09d8cf942689 100644 > --- a/drivers/staging/media/hantro/hantro_postproc.c > +++ b/drivers/staging/media/hantro/hantro_postproc.c > @@ -114,6 +114,7 @@ static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) > struct hantro_dev *vpu = ctx->dev; > struct vb2_v4l2_buffer *dst_buf; > int down_scale = down_scale_factor(ctx); > + int out_depth; > size_t chroma_offset; > dma_addr_t dst_dma; > > @@ -132,8 +133,9 @@ static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) > hantro_write_addr(vpu, G2_RS_OUT_LUMA_ADDR, dst_dma); > hantro_write_addr(vpu, G2_RS_OUT_CHROMA_ADDR, dst_dma + chroma_offset); > } > + > + out_depth = hantro_get_format_depth(ctx->dst_fmt.pixelformat); > if (ctx->dev->variant->legacy_regs) { > - int out_depth = hantro_get_format_depth(ctx->dst_fmt.pixelformat); > u8 pp_shift = 0; > > if (out_depth > 8) > @@ -141,6 +143,9 @@ static void hantro_postproc_g2_enable(struct hantro_ctx *ctx) > > hantro_reg_write(ctx->dev, &g2_rs_out_bit_depth, out_depth); > hantro_reg_write(ctx->dev, &g2_pp_pix_shift, pp_shift); > + } else { > + hantro_reg_write(vpu, &g2_output_8_bits, out_depth > 8 ? 0 : 1); > + hantro_reg_write(vpu, &g2_output_format, out_depth > 8 ? 1 : 0); > } > hantro_reg_write(vpu, &g2_out_rs_e, 1); > } > -- > 2.32.0 >