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Removed braces from a single line. Signed-off-by: Ravi Kumar Kairi --- .../gpib/agilent_82350b/agilent_82350b.c | 29 ++++--------------- 1 file changed, 6 insertions(+), 23 deletions(-) diff --git a/drivers/staging/gpib/agilent_82350b/agilent_82350b.c b/drivers/staging/gpib/agilent_82350b/agilent_82350b.c index 5c62ec24fc..9c9e66b85b 100644 --- a/drivers/staging/gpib/agilent_82350b/agilent_82350b.c +++ b/drivers/staging/gpib/agilent_82350b/agilent_82350b.c @@ -48,7 +48,7 @@ static int agilent_82350b_accel_read(gpib_board_t *board, uint8_t *buffer, size_ return 0; //disable fifo for the moment writeb(DIRECTION_GPIB_TO_HOST, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG); - // handle corner case of board not in holdoff and one byte might slip in early + // handle corner case of board not in hold off and one byte might slip in early if (tms_priv->holdoff_active == 0 && length > 1) { size_t num_bytes; @@ -121,10 +121,10 @@ static int agilent_82350b_accel_read(gpib_board_t *board, uint8_t *buffer, size_ writeb(DIRECTION_GPIB_TO_HOST, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG); if (retval < 0) return retval; - // read last bytes if we havn't received an END yet + // read last bytes if we haven't received an END yet if (*end == 0) { size_t num_bytes; - // try to make sure we holdoff after last byte read + // try to make sure we hold off after last byte read retval = tms9914_read(board, tms_priv, buffer, length, end, &num_bytes); *bytes_read += num_bytes; if (retval < 0) @@ -176,8 +176,6 @@ static int agilent_82350b_accel_write(gpib_board_t *board, uint8_t *buffer, size event_status = read_and_clear_event_status(board); - //pr_info("ag_ac_wr: event status 0x%x tms state 0x%lx\n", event_status, tms_priv->state); - #ifdef EXPERIMENTAL pr_info("ag_ac_wr: wait for previous BO to complete if any\n"); retval = wait_event_interruptible(board->wait, @@ -190,18 +188,14 @@ static int agilent_82350b_accel_write(gpib_board_t *board, uint8_t *buffer, size return retval; #endif - //pr_info("ag_ac_wr: sending first byte\n"); retval = agilent_82350b_write(board, buffer, 1, 0, &num_bytes); *bytes_written += num_bytes; if (retval < 0) return retval; - //pr_info("ag_ac_wr: %ld bytes eoi %d tms state 0x%lx\n",length, send_eoi, tms_priv->state); - write_byte(tms_priv, tms_priv->imr0_bits & ~HR_BOIE, IMR0); for (i = 1; i < fifotransferlength;) { clear_bit(WRITE_READY_BN, &tms_priv->state); - block_size = min(fifotransferlength - i, agilent_82350b_fifo_size); set_transfer_counter(a_priv, block_size); for (j = 0; j < block_size; ++j, ++i) { @@ -210,13 +204,8 @@ static int agilent_82350b_accel_write(gpib_board_t *board, uint8_t *buffer, size } writeb(ENABLE_TI_TO_SRAM, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG); - //pr_info("ag_ac_wr: send block: %d bytes tms 0x%lx\n", block_size, - // tms_priv->state); - - if (agilent_82350b_fifo_is_halted(a_priv)) { + if (agilent_82350b_fifo_is_halted(a_priv)) writeb(RESTART_STREAM_BIT, a_priv->gpib_base + STREAM_STATUS_REG); - // pr_info("ag_ac_wr: needed restart\n"); - } retval = wait_event_interruptible(board->wait, ((event_status = @@ -226,8 +215,6 @@ static int agilent_82350b_accel_write(gpib_board_t *board, uint8_t *buffer, size test_bit(TIMO_NUM, &board->status)); writeb(0, a_priv->gpib_base + SRAM_ACCESS_CONTROL_REG); num_bytes = block_size - read_transfer_counter(a_priv); - //pr_info("ag_ac_wr: sent %ld bytes tms 0x%lx\n", num_bytes, tms_priv->state); - *bytes_written += num_bytes; retval = translate_wait_return_value(board, retval); if (retval) @@ -238,9 +225,6 @@ static int agilent_82350b_accel_write(gpib_board_t *board, uint8_t *buffer, size return retval; if (send_eoi) { - //pr_info("ag_ac_wr: sending last byte with eoi byte no: %d\n", - // fifotransferlength+1); - retval = agilent_82350b_write(board, buffer + fifotransferlength, 1, send_eoi, &num_bytes); *bytes_written += num_bytes; @@ -284,8 +268,7 @@ static irqreturn_t agilent_82350b_interrupt(int irq, void *arg) tms9914_interrupt_have_status(board, &a_priv->tms9914_priv, tms9914_status1, tms9914_status2); } -//pr_info("event_status=0x%x s1 %x s2 %x\n", event_status,tms9914_status1,tms9914_status2); -//write-clear status bits + if (event_status & (BUFFER_END_STATUS_BIT | TERM_COUNT_STATUS_BIT)) { writeb(event_status & (BUFFER_END_STATUS_BIT | TERM_COUNT_STATUS_BIT), a_priv->gpib_base + EVENT_STATUS_REG); @@ -317,7 +300,7 @@ static void set_transfer_counter(struct agilent_82350b_priv *a_priv, int count) writeb(complement & 0xff, a_priv->gpib_base + XFER_COUNT_LO_REG); writeb((complement >> 8) & 0xff, a_priv->gpib_base + XFER_COUNT_MID_REG); - //I don't think the hi count reg is even used, but oh well + // I don't think the hi count reg is even used, but oh well writeb((complement >> 16) & 0xf, a_priv->gpib_base + XFER_COUNT_HI_REG); } -- 2.48.1