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[86.58.6.171]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-458b8aab8c0sm413149275e9.19.2025.08.11.21.15.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Aug 2025 21:15:00 -0700 (PDT) From: Jernej =?UTF-8?B?xaBrcmFiZWM=?= To: u-boot@lists.denx.de, Andre Przywara Cc: Tom Rini , Cody Eksal , Chris Morgan , linux-sunxi@lists.linux.dev Subject: Re: [PATCH 2/3] sunxi: spl: initialise timer before clocks Date: Tue, 12 Aug 2025 06:14:59 +0200 Message-ID: <1900891.atdPhlSkOF@jernej-laptop> In-Reply-To: <20250801234918.19176-3-andre.przywara@arm.com> References: <20250801234918.19176-1-andre.przywara@arm.com> <20250801234918.19176-3-andre.przywara@arm.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" Dne sobota, 2. avgust 2025 ob 01:49:17 Srednjeevropski poletni =C4=8Das je = Andre Przywara napisal(a): > Recent changes in the H6 clock code added delay() calls into the SPL clock > setup routine, which requires the timers to work. When compiling for > AArch64, we are always using the Arm Generic Timer (aka. arch timer), > which does not require further setup, hence having an empty timer_init() > routine. > However for 32-bit SoCs we use the Allwinner timers, which require some > setup routine, and hence we need timer_init() to be called before > clock_init(). >=20 > Swap the order of the two calls, to be more robust when compiling the H6 > clock code for AArch32 or when using the Allwinner timers for whatever > reason. >=20 > Signed-off-by: Andre Przywara Reviewed-by: Jernej Skrabec Best regards, Jernej > --- > arch/arm/mach-sunxi/board.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) >=20 > diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c > index fb4837c2082..432b1c10f92 100644 > --- a/arch/arm/mach-sunxi/board.c > +++ b/arch/arm/mach-sunxi/board.c > @@ -476,8 +476,8 @@ void board_init_f(ulong dummy) > /* Enable non-secure access to some peripherals */ > tzpc_init(); > =20 > - clock_init(); > timer_init(); > + clock_init(); > gpio_init(); > =20 > spl_init(); >=20