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Mon, 15 Jun 2026 10:46:30 -0700 (PDT) From: Jerome Brunet To: Chen-Yu Tsai Cc: Junhui Liu , Michael Turquette , Stephen Boyd , Jernej Skrabec , Samuel Holland , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Maxime Ripard , linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-rtc@vger.kernel.org, devicetree@vger.kernel.org Subject: Re: [PATCH 1/7] dt-bindings: rtc: sun6i: Add Allwinner A733 support In-Reply-To: (Chen-Yu Tsai's message of "Sat, 28 Mar 2026 20:37:26 +0800") References: <20260121-a733-rtc-v1-0-d359437f23a7@pigmoral.tech> <20260121-a733-rtc-v1-1-d359437f23a7@pigmoral.tech> User-Agent: mu4e 1.12.9; emacs 30.1 Date: Mon, 15 Jun 2026 19:46:29 +0200 Message-ID: <1j1pe7elxm.fsf@starbuckisacylon.baylibre.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On sam. 28 mars 2026 at 20:37, Chen-Yu Tsai wrote: > On Wed, Jan 21, 2026 at 7:03=E2=80=AFPM Junhui Liu wrote: >> >> The RTC module in the Allwinner A733 SoC is functionally compatible with >> the sun6i RTC, but its internal Clock Control Unit (CCU) has significant >> changes. >> >> The A733 supports selecting the oscillator between three frequencies: >> 19.2MHz, 24MHz, and 26MHz. The RTC CCU relies on hardware to detect >> which frequency is actually used on the board. By defining all three >> frequencies as fixed-clocks in the device tree, the driver can identify >> the hardware-detected frequency and expose it to the rest of the system. > > No. The board device tree shall have the exact and correct frequency > defined in the external crystal device node. The operating system can > use the hardware-detected frequency to "fix" the in-system representation > if it is off. > >> Additionally, the A733 RTC CCU provides several new DCXO gate clocks for >> specific modules, including SerDes, HDMI, and UFS. >> >> Signed-off-by: Junhui Liu >> --- >> .../bindings/rtc/allwinner,sun6i-a31-rtc.yaml | 38 +++++++++++++++= +++++-- >> include/dt-bindings/clock/sun60i-a733-rtc.h | 16 +++++++++ >> 2 files changed, 52 insertions(+), 2 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-r= tc.yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml >> index 9df5cdb6f63f..b18431955783 100644 >> --- a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml >> +++ b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml >> @@ -26,6 +26,7 @@ properties: >> - allwinner,sun50i-h6-rtc >> - allwinner,sun50i-h616-rtc >> - allwinner,sun50i-r329-rtc >> + - allwinner,sun60i-a733-rtc >> - items: >> - const: allwinner,sun50i-a64-rtc >> - const: allwinner,sun8i-h3-rtc >> @@ -46,11 +47,11 @@ properties: >> >> clocks: >> minItems: 1 >> - maxItems: 4 >> + maxItems: 6 >> >> clock-names: >> minItems: 1 >> - maxItems: 4 >> + maxItems: 6 >> >> clock-output-names: >> minItems: 1 >> @@ -156,6 +157,38 @@ allOf: >> - clocks >> - clock-names >> >> + - if: >> + properties: >> + compatible: >> + contains: >> + const: allwinner,sun60i-a733-rtc >> + >> + then: >> + properties: >> + clocks: >> + minItems: 5 >> + items: >> + - description: Bus clock for register access > >> + - description: 19.2 MHz oscillator >> + - description: 24 MHz oscillator >> + - description: 26 MHz oscillator > > No. There is only one input. As in there is only one set of pins for the > DCXO. The inputs are the same as on R329 / A523. Just use that list. > >> + - description: AHB parent for internal SPI clock >> + - description: External 32768 Hz oscillator >> + >> + clock-names: >> + minItems: 5 >> + items: >> + - const: bus >> + - const: osc19M >> + - const: osc24M >> + - const: osc26M >> + - const: ahb >> + - const: ext-osc32k >> + >> + required: >> + - clocks >> + - clock-names >> + >> - if: >> properties: >> compatible: >> @@ -164,6 +197,7 @@ allOf: >> - allwinner,sun8i-r40-rtc >> - allwinner,sun50i-h616-rtc >> - allwinner,sun50i-r329-rtc >> + - allwinner,sun60i-a733-rtc >> >> then: >> properties: >> diff --git a/include/dt-bindings/clock/sun60i-a733-rtc.h b/include/dt-bi= ndings/clock/sun60i-a733-rtc.h >> new file mode 100644 >> index 000000000000..8a2b5facad73 >> --- /dev/null >> +++ b/include/dt-bindings/clock/sun60i-a733-rtc.h >> @@ -0,0 +1,16 @@ >> +/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ >> + >> +#ifndef _DT_BINDINGS_CLK_SUN60I_A733_RTC_H_ >> +#define _DT_BINDINGS_CLK_SUN60I_A733_RTC_H_ >> + >> +#define CLK_IOSC 0 >> +#define CLK_OSC32K 1 >> +#define CLK_HOSC 2 > > The DCXO enable control has been present since at least the H6. We just > never added it, as we would never disable it anyway. > > If you compare the RTC clock trees of the A733 and A523, the only addition > besides the new gates seems to be the LOSC auto selection. But even that > is just an illusion, as the A523 has the same registers for that. > > One could say the A733 RTC is almost backward compatible to the A523, if > not for the two fastboot registers the A523 has at 0x120 and 0x124. > > So I ask that you try to integrate the differences into the existing > driver and bindings. You can tweak and export internal clks if you > need. I'd like to help with that. I think it is doable but I have a question regarding the binding of the existing driver, more precisely their usage here: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/dri= vers/clk/sunxi-ng/ccu-sun6i-rtc.c?h=3Dv7.1#n370 Clock indexes are supposed to be stable in DT (AFAIK) but with the code linked the external 32k is at: * "ext-32k" - so index 3 - if "clock-names" is present * index 0 if clock names is not present ... but index 0 is supposed to be the bus clock according the binding doc, whether "clock-names" is there or not :/ So what are those old r329 bindings ? is there a documentation defining them somewhere ? Cleaning that part would help with A733 addition in the existing driver I think > >> +#define CLK_RTC_32K 3 > > AFAICT besides being an internal clock, this is also fed to GPIO for > debounce? We probably need to expose this on the A523 as well. > > > Thanks > ChenYu > > >> +#define CLK_OSC32K_FANOUT 4 >> +#define CLK_HOSC_SERDES1 5 >> +#define CLK_HOSC_SERDES0 6 >> +#define CLK_HOSC_HDMI 7 >> +#define CLK_HOSC_UFS 8 >> + >> +#endif /* _DT_BINDINGS_CLK_SUN60I_A733_RTC_H_ */ >> >> -- >> 2.52.0 >> >> --=20 Jerome