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[82.67.6.57]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49e60ababd5sm83052575e9.4.2026.09.11.02.28.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 11 Sep 2026 02:28:42 -0700 (PDT) From: Jerome Brunet To: Andre Przywara , Enzo Adriano via B4 Relay Cc: enzo.adriano.code@gmail.com, Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Ulf Hansson , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-mmc@vger.kernel.org Subject: Re: [PATCH 3/4] arm64: dts: allwinner: add Allwinner A733 SoC In-Reply-To: <20260911001805.0a2e033d@ryzen.lan> References: <20260613-a733-dts-v1-public-ready-v1-0-7787c94681db@gmail.com> <20260613-a733-dts-v1-public-ready-v1-3-7787c94681db@gmail.com> <20260911001805.0a2e033d@ryzen.lan> Date: Fri, 11 Sep 2026 11:28:36 +0200 Message-ID: <1jo6e46ssb.fsf@starbuckisacylon.baylibre.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain On ven. 11 sept. 2026 at 00:18, Andre Przywara wrote: > And what about I2C? We would need that for the AXP PMIC. Having that in > the initial DT is required to keep the DTBs compatible with older/stable > kernels later on. > > And it seems like the whole r_ side is missing, even those we should > have bindings for those. At least r_pio and r_ccu would be needed, plus > r_i2c. I have sent the i2c binding but it did get picked up. https://lore.kernel.org/all/20260707-allwinner-a733-i2c-compatible-v1-1-566340542bdd@baylibre.com/ It is a marvell ip and I used b4 to send the change. I did not notice until now that the sunxi list was not Cced. I'll re-sent it > > Cheers, > Andre > >> + }; >> +}; >> > -- Jerome