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Sun, 02 Aug 2026 08:24:29 -0700 (PDT) From: Jerome Brunet To: sashiko-bot@kernel.org Cc: sashiko-reviews@lists.linux.dev, conor+dt@kernel.org, devicetree@vger.kernel.org, robh@kernel.org, linux-sunxi@lists.linux.dev Subject: Re: [PATCH RFC/RFT 2/2] net: stmmac: Add support for Allwinner A733 GMAC210 In-Reply-To: <20260801163100.639F21F00AC4@smtp.kernel.org> (sashiko-bot@kernel.org's message of "Sat, 01 Aug 2026 16:30:59 +0000") References: <20260731-allwinner-a733-gmac-support-v1-0-d0a8732bfa82@baylibre.com> <20260731-allwinner-a733-gmac-support-v1-2-d0a8732bfa82@baylibre.com> <20260801163100.639F21F00AC4@smtp.kernel.org> User-Agent: mu4e 1.12.9; emacs 30.1 Date: Sun, 02 Aug 2026 17:24:27 +0200 Message-ID: <1jv79slf4k.fsf@starbuckisacylon.baylibre.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On sam. 01 ao=C3=BBt 2026 at 16:30, sashiko-bot@kernel.org wrote: > >> + if (!plat->stmmac_rst || !plat->stmmac_ahb_rst) { >> + dev_err(dev, "missing required reset controls\n"); >> + return ERR_PTR(-EINVAL); >> + } >> + >> + /* >> + * The configuration registers are inside the controller >> + * reset domain, so the reset must happen before any write to them >> + * and should not be done again by stmmac or the configuration will >> + * be lost. >> + */ >> + ret =3D reset_control_assert(plat->stmmac_rst); >> + if (!ret) >> + ret =3D reset_control_deassert(plat->stmmac_rst); > > [Severity: High] > Will this cause a bus hang when writing to the MMIO registers? > No it does not. I've checked. Actually touching the ahb reset here has negative effect. stmmac does not properly detect the link type then (GMII instead of RGMII) > The code checks that plat->stmmac_ahb_rst is present earlier in this > function, but only toggles the main mac reset here.=20 > > When sun55i_gmac200_setup() later calls regmap_write(), accessing an IP > block over the AHB bus while its AHB interface is still held in reset > typically causes a synchronous external abort or bus hang. > >> + >> + if (ret) { >> + dev_err_probe(dev, ret, "device reset failed\n"); > > [ ... ] > >> static int sun55i_gmac200_setup(struct platform_device *pdev, >> struct plat_stmmacenet_data *plat, >> const struct sun55i_gmac_data *data) >> { > > [ ... ] > >> - ret =3D regmap_write(regmap, SYSCON_REG, reg); >> + ret =3D regmap_write(regmap, data->offset, reg); >> if (ret < 0) >> return dev_err_probe(dev, ret, "Failed to write to syscon\n"); >>=20=20 >> + plat->flags |=3D data->flags; >> + plat->host_dma_width =3D 32; >> + >> return 0; >> } > > [Severity: High] > Are these custom hardware settings lost after a system suspend? > > The driver configures critical hardware properties like TX/RX delays and > PHY interface modes in the MAC's internal glue configuration registers > here, but does not appear to assign a plat->resume callback to the > plat_stmmacenet_data structure. > > If the MAC loses power during suspend, won't these registers revert to > their default states on resume, leaving the network broken because the > generic stmmac_resume() has no way to invoke this glue logic? Assuming there is an issue here, it would be a pre-existing one for this driver, same as the sun55i-a523. Let's not get ahead of ourselves. Support for this chip is still in the very early phase. I don't think we have the means to test suspend yet. --=20 Jerome