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From: Andre Przywara <andre.przywara@arm.com>
To: Jagan Teki <jagan@amarulasolutions.com>
Cc: Jesse Taube <mr.bossman075@gmail.com>,
	Icenowy Zheng <icenowy@aosc.io>, Yifan Gu <me@yifangu.com>,
	Giulio Benetti <giulio.benetti@benettiengineering.com>,
	George Hilliard <thirtythreeforty@gmail.com>,
	Samuel Holland <samuel@sholland.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	linux-sunxi@lists.linux.dev, u-boot@lists.denx.de
Subject: Re: [PATCH 6/7] Revert "sunxi: f1c100s: Drop SYSRESET to enable reset functionality"
Date: Tue, 24 May 2022 17:11:35 +0100	[thread overview]
Message-ID: <20220524171135.7f7a6d28@donnerap.cambridge.arm.com> (raw)
In-Reply-To: <20220503212040.27884-7-andre.przywara@arm.com>

On Tue,  3 May 2022 22:20:39 +0100
Andre Przywara <andre.przywara@arm.com> wrote:

> The original Allwinner F1C100 .dtsi imported from the Linux kernel tree
> used the wrong compatible string for the watchdog timer, so the Allwinner
> DM reset driver was not working properly. We worked around this by
> disabling the SYSRESET driver, so the hardcoded SPL reset driver took
> over.
> Now the issue was fixed in the DTs in mainline Linux, and we synced the
> fixed .dtsi file into U-Boot, so drop the hack and use the normal U-Boot
> proper reset infrastructure.
> 
> This reverts commit cfcf1952c11e6ffcbbf88eb63c49edca2acf1d5e.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Applied to sunxi/master.

Thanks,
Andre

> ---
>  configs/licheepi_nano_defconfig | 1 -
>  1 file changed, 1 deletion(-)
> 
> diff --git a/configs/licheepi_nano_defconfig b/configs/licheepi_nano_defconfig
> index 67b7b85c491..9fd1dcc9958 100644
> --- a/configs/licheepi_nano_defconfig
> +++ b/configs/licheepi_nano_defconfig
> @@ -10,4 +10,3 @@ CONFIG_DRAM_CLK=156
>  CONFIG_DRAM_ZQ=0
>  # CONFIG_VIDEO_SUNXI is not set
>  CONFIG_SPL_SPI_SUNXI=y
> -# CONFIG_SYSRESET is not set


  reply	other threads:[~2022-05-24 16:16 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-05-03 21:20 [PATCH 0/7] sunxi: F1C100s: enable MMC and SPI in U-Boot proper Andre Przywara
2022-05-03 21:20 ` [PATCH 1/7] clk: sunxi: implement clock driver for suniv f1c100s Andre Przywara
2022-05-24 16:10   ` Andre Przywara
2022-05-03 21:20 ` [PATCH 2/7] spi: sunxi: refactor SPI speed/mode programming Andre Przywara
2022-06-28  0:31   ` Andre Przywara
2022-06-28  3:43     ` Jesse Taube
2022-07-18 10:17       ` Andre Przywara
2022-06-30  3:25     ` Jesse Taube
2022-05-03 21:20 ` [PATCH 3/7] spi: sunxi: improve SPI clock calculation Andre Przywara
2022-05-03 21:20 ` [PATCH 4/7] spi: sunxi: Add support for F1C100s SPI controller Andre Przywara
2022-05-03 21:20 ` [PATCH 5/7] sunxi: F1C100s: update DT files from Linux Andre Przywara
2022-05-05 11:26   ` Jesse Taube
2022-05-24 16:11   ` Andre Przywara
2022-05-03 21:20 ` [PATCH 6/7] Revert "sunxi: f1c100s: Drop SYSRESET to enable reset functionality" Andre Przywara
2022-05-24 16:11   ` Andre Przywara [this message]
2022-05-03 21:20 ` [PATCH 7/7] sunxi: licheepi_nano: enable SPI flash Andre Przywara

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