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From: Samuel Holland <samuel@sholland.org>
To: Corentin Labbe <clabbe.montjoie@gmail.com>,
	Herbert Xu <herbert@gondor.apana.org.au>,
	"David S . Miller" <davem@davemloft.net>,
	Chen-Yu Tsai <wens@csie.org>,
	Jernej Skrabec <jernej.skrabec@gmail.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Rob Herring <robh+dt@kernel.org>
Cc: Samuel Holland <samuel@sholland.org>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Conor Dooley <conor@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	linux-crypto@vger.kernel.org, linux-kernel@vger.kernel.org,
	linux-riscv@lists.infradead.org, linux-sunxi@lists.linux.dev
Subject: [PATCH v2 2/3] crypto: sun8i-ce - Add TRNG clock to the D1 variant
Date: Sat, 31 Dec 2022 16:01:44 -0600	[thread overview]
Message-ID: <20221231220146.646-3-samuel@sholland.org> (raw)
In-Reply-To: <20221231220146.646-1-samuel@sholland.org>

At least the D1 variant requires a separate clock for the TRNG.
Without this clock enabled, reading from /dev/hwrng reports:

   sun8i-ce 3040000.crypto: DMA timeout for TRNG (tm=96) on flow 3

Experimentation shows that the necessary clock is the SoC's internal
RC oscillator. This makes sense, as noise from the oscillator can be
used as a source of entropy.

Signed-off-by: Samuel Holland <samuel@sholland.org>
---

Changes in v2:
 - New patch for v2

 drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c | 1 +
 drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h      | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
index 9f6594699835..a6865ff4d400 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce-core.c
@@ -118,6 +118,7 @@ static const struct ce_variant ce_d1_variant = {
 		{ "bus", 0, 200000000 },
 		{ "mod", 300000000, 0 },
 		{ "ram", 0, 400000000 },
+		{ "trng", 0, 0 },
 		},
 	.esr = ESR_D1,
 	.prng = CE_ALG_PRNG,
diff --git a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
index 8177aaba4434..27029fb77e29 100644
--- a/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
+++ b/drivers/crypto/allwinner/sun8i-ce/sun8i-ce.h
@@ -105,7 +105,7 @@
 
 #define MAX_SG 8
 
-#define CE_MAX_CLOCKS 3
+#define CE_MAX_CLOCKS 4
 
 #define MAXFLOW 4
 
-- 
2.37.4


  parent reply	other threads:[~2022-12-31 22:01 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-12-31 22:01 [PATCH v2 0/3] crypto: Allwinner D1 crypto support Samuel Holland
2022-12-31 22:01 ` [PATCH v2 1/3] dt-bindings: crypto: sun8i-ce: Add compatible for D1 Samuel Holland
2023-01-01 15:57   ` Krzysztof Kozlowski
2023-01-06  8:20   ` Corentin Labbe
2023-01-13  3:51   ` Herbert Xu
2023-01-13  8:33     ` Krzysztof Kozlowski
2023-01-13  8:37       ` Herbert Xu
2022-12-31 22:01 ` Samuel Holland [this message]
2023-01-05 16:29   ` [PATCH v2 2/3] crypto: sun8i-ce - Add TRNG clock to the D1 variant Jernej Škrabec
2023-01-06  8:18   ` Corentin Labbe
2022-12-31 22:01 ` [PATCH v2 3/3] riscv: dts: allwinner: d1: Add crypto engine node Samuel Holland
2023-01-05 16:30   ` Jernej Škrabec
2023-03-07 20:55   ` Palmer Dabbelt
2023-03-14 20:35   ` Jernej Škrabec
2023-01-13  8:40 ` [PATCH v2 0/3] crypto: Allwinner D1 crypto support Herbert Xu

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