From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mslow1.mail.gandi.net (mslow1.mail.gandi.net [217.70.178.240]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 966F14E1DE for ; Wed, 22 Nov 2023 14:26:05 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=bootlin.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=bootlin.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com header.b="lZr+F0YT" Received: from relay4-d.mail.gandi.net (unknown [217.70.183.196]) by mslow1.mail.gandi.net (Postfix) with ESMTP id 8A787C9498 for ; Wed, 22 Nov 2023 14:15:00 +0000 (UTC) Received: by mail.gandi.net (Postfix) with ESMTPSA id 1B494E0009; Wed, 22 Nov 2023 14:14:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1700662492; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MbVQzX9cYR/++E90CQRNI6quSUpAd4A/5VEQuPiEtWI=; b=lZr+F0YTNHF6CaCw6lHJBLFdVfhZhxauFXKIIof73388r5Z25FoeU03jC2xC38zSwS9znR v+jAMrKJDWwKy5a9e52nblfc0bo/AOyhmg/vmMexkxcw/j79DqP70k8riNP4ABYhuwk3No dzFRWGz1DFAxH1QMVwJ/OTKRQkzEF+NMZo/AsQOQ/Eb3N3yBdhVxBs/gsBvsaO3HdLKY+Y 2Ne/JpL/nZ5nVrseDzrXJhxFFVVrNRSnQ+eqooWs0XltLhJC/6vGJSPBjiwmZBtw4s8La3 bx/LwkxJQSZfQwwr9Jao53POWapJbl6++j5/CC4MXtnpwOvP4XADMtGe4n0C+A== From: Paul Kocialkowski To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Maxime Ripard , Laurent Pinchart , Michael Turquette , Stephen Boyd , Paul Kocialkowski Subject: [PATCH v7 6/7] ARM: dts: sun8i-a83t: Add BananaPi M3 OV5640 camera overlay Date: Wed, 22 Nov 2023 15:14:24 +0100 Message-ID: <20231122141426.329694-7-paul.kocialkowski@bootlin.com> X-Mailer: git-send-email 2.42.1 In-Reply-To: <20231122141426.329694-1-paul.kocialkowski@bootlin.com> References: <20231122141426.329694-1-paul.kocialkowski@bootlin.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-GND-Sasl: paul.kocialkowski@bootlin.com Add an overlay supporting the OV5640 from the BananaPi Camera v3 peripheral board. The board has two sensors (OV5640 and OV8865) which cannot be supported in parallel as they share the same reset pin and the kernel currently has no support for this case. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/allwinner/Makefile | 1 + .../sun8i-a83t-bananapi-m3-camera-ov5640.dtso | 117 ++++++++++++++++++ 2 files changed, 118 insertions(+) create mode 100644 arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-camera-ov5640.dtso diff --git a/arch/arm/boot/dts/allwinner/Makefile b/arch/arm/boot/dts/allwinner/Makefile index eebb5a0c873a..a0a9aa6595e4 100644 --- a/arch/arm/boot/dts/allwinner/Makefile +++ b/arch/arm/boot/dts/allwinner/Makefile @@ -277,6 +277,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \ sun8i-a33-sinlinx-sina33.dtb \ sun8i-a83t-allwinner-h8homlet-v2.dtb \ sun8i-a83t-bananapi-m3.dtb \ + sun8i-a83t-bananapi-m3-camera-ov5640.dtbo \ sun8i-a83t-cubietruck-plus.dtb \ sun8i-a83t-tbs-a711.dtb \ sun8i-h2-plus-bananapi-m2-zero.dtb \ diff --git a/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-camera-ov5640.dtso b/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-camera-ov5640.dtso new file mode 100644 index 000000000000..5868ef11bdee --- /dev/null +++ b/arch/arm/boot/dts/allwinner/sun8i-a83t-bananapi-m3-camera-ov5640.dtso @@ -0,0 +1,117 @@ +// SPDX-License-Identifier: GPL-2.0 OR X11 +/* + * Copyright 2022 Bootlin + * Author: Paul Kocialkowski + */ + +/dts-v1/; +/plugin/; + +#include +#include + +&{/} { + /* + * These regulators actually have DLDO4 tied to their EN pin, which is + * described as input supply here for lack of a better representation. + * Their actual supply is PS, which is always-on. + */ + + ov5640_avdd: ov5640-avdd { + compatible = "regulator-fixed"; + regulator-name = "ov5640-avdd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <®_dldo4>; + }; + + ov5640_dovdd: ov5640-dovdd { + compatible = "regulator-fixed"; + regulator-name = "ov5640-dovdd"; + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; + vin-supply = <®_dldo4>; + }; + + ov5640_dvdd: ov5640-dvdd { + compatible = "regulator-fixed"; + regulator-name = "ov5640-dvdd"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + vin-supply = <®_dldo4>; + }; +}; + +&csi { + pinctrl-names = "default"; + pinctrl-0 = <&csi_8bit_parallel_pins>; + status = "okay"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + csi_in_ov5640: endpoint { + remote-endpoint = <&ov5640_out_csi>; + bus-width = <8>; + data-shift = <2>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <1>; + }; + }; + }; +}; + +&i2c2 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pe_pins>; + status = "okay"; + + #address-cells = <1>; + #size-cells = <0>; + + ov5640: camera@3c { + compatible = "ovti,ov5640"; + reg = <0x3c>; + + clocks = <&ccu CLK_CSI_MCLK>; + clock-names = "xclk"; + assigned-clocks = <&ccu CLK_CSI_MCLK>; + assigned-clock-parents = <&osc24M>; + assigned-clock-rates = <24000000>; + + AVDD-supply = <&ov5640_avdd>; + DOVDD-supply = <&ov5640_dovdd>; + DVDD-supply = <&ov5640_dvdd>; + + powerdown-gpios = <&pio 3 15 GPIO_ACTIVE_HIGH>; /* PD15 */ + reset-gpios = <&pio 4 16 GPIO_ACTIVE_LOW>; /* PE16 */ + + rotation = <180>; + + port { + ov5640_out_csi: endpoint { + remote-endpoint = <&csi_in_ov5640>; + bus-width = <8>; + data-shift = <2>; + hsync-active = <1>; + vsync-active = <1>; + pclk-sample = <1>; + }; + }; + }; +}; + +&pio { + pinctrl-names = "default"; + pinctrl-0 = <&csi_mclk_pin>; +}; + +®_dldo4 { + regulator-min-microvolt = <2800000>; + regulator-max-microvolt = <2800000>; +}; -- 2.42.1