From: Brandon Cheo Fusi <fusibrandon13@gmail.com>
To: Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Conor Dooley <conor+dt@kernel.org>,
Paul Walmsley <paul.walmsley@sifive.com>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>, Chen-Yu Tsai <wens@csie.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Yangtao Li <tiny.windzz@gmail.com>,
"Rafael J . Wysocki" <rafael@kernel.org>,
Viresh Kumar <viresh.kumar@linaro.org>
Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-riscv@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
Brandon Cheo Fusi <fusibrandon13@gmail.com>
Subject: [RFC PATCH 2/2] riscv: dts: allwinner: Fill in OPPs
Date: Wed, 20 Dec 2023 10:51:41 +0100 [thread overview]
Message-ID: <20231220095141.27883-3-fusibrandon13@gmail.com> (raw)
In-Reply-To: <20231220095141.27883-1-fusibrandon13@gmail.com>
Specifies two voltage ranges, in order of increasing stability,
for each OPP. This is heavily inspired by
https://github.com/Tina-Linux/linux-5.4/blob/master/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi#L118-L133
and
https://github.com/mangopi-sbc/tina-linux-5.4/blob/0d4903ebd9d2194ad914686d5b0fc1ddacf11a9d/arch/riscv/boot/dts/sunxi/sun20iw1p1.dtsi#L118-L182
Signed-off-by: Brandon Cheo Fusi <fusibrandon13@gmail.com>
---
arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
index 2f1771c19..8e7bc8bd0 100644
--- a/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
+++ b/arch/riscv/boot/dts/allwinner/sun20i-d1s.dtsi
@@ -48,13 +48,17 @@ opp_table_cpu: opp-table-cpu {
opp-408000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <408000000>;
- opp-microvolt-speed0 = <900000 900000 1100000>;
+
+ opp-microvolt-speed0 = <950000 900000 1100000>;
+ opp-microvolt-speed1 = <900000 900000 1100000>;
};
opp-1080000000 {
clock-latency-ns = <244144>; /* 8 32k periods */
opp-hz = /bits/ 64 <1008000000>;
- opp-microvolt-speed0 = <900000 900000 1100000>;
+
+ opp-microvolt-speed0 = <1100000 900000 1100000>;
+ opp-microvolt-speed1 = <950000 900000 1100000>;
};
};
--
2.30.2
next prev parent reply other threads:[~2023-12-20 9:52 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-20 9:51 [RFC PATCH 0/2] Add support for reading D1 efuse speed bin Brandon Cheo Fusi
2023-12-20 9:51 ` [RFC PATCH 1/2] cpufreq: sun50i: Add support for D1's speed bin decoding Brandon Cheo Fusi
2023-12-20 10:39 ` Andre Przywara
2023-12-20 9:51 ` Brandon Cheo Fusi [this message]
2023-12-20 15:25 ` [RFC PATCH 2/2] riscv: dts: allwinner: Fill in OPPs Jernej Škrabec
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