From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by smtp.subspace.kernel.org (Postfix) with ESMTP id 83D202D045 for ; Mon, 18 Mar 2024 10:51:59 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=217.140.110.172 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710759121; cv=none; b=a5Kx3y/JRd2nVpCWT5QEdXK8pKaKKZf1C1Qm7Yf12WjIriBcEZM5/WbRAUf4dXLrBQHChb97WUJC5uS9aMxcnZVhZWCRYpBN1qHg3tibHUZu61qzJlOOMyE/WMZZQ3E12T6D6nVwBfDRnQJpBPTuVgt4JGocM+GrXz3YkylKg2U= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1710759121; c=relaxed/simple; bh=/JWCp5q2+nXWg7kGQTCue5qLlqIwKCcMXWzyiqkjiPo=; h=Date:From:To:Cc:Subject:Message-ID:In-Reply-To:References: MIME-Version:Content-Type; b=WNnKI0vRVs6zhrzBr5IvfcYgumjDHhtot6JhQlU+9/eYsS+dD19txIul7bbfiMIslLEjyLmqL0v3UQIBu/zrqWn5LZzsvG0h7IBZOV5bogejEF6aQ274ZxbP6n9RVveOHmS0drkXpntCAu3WQX4kQlKwMyTllF1tJoChtXml0Hc= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com; spf=pass smtp.mailfrom=arm.com; arc=none smtp.client-ip=217.140.110.172 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=arm.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=arm.com Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6C3F1DA7; Mon, 18 Mar 2024 03:52:33 -0700 (PDT) Received: from donnerap.manchester.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 297173F762; Mon, 18 Mar 2024 03:51:56 -0700 (PDT) Date: Mon, 18 Mar 2024 10:51:53 +0000 From: Andre Przywara To: Amit Singh Tomar Cc: Yangtao Li , Viresh Kumar , Nishanth Menon , Stephen Boyd , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , "Rafael J . Wysocki" , "linux-pm@vger.kernel.org" , "devicetree@vger.kernel.org" , "linux-sunxi@lists.linux.dev" , "linux-arm-kernel@lists.infradead.org" , Brandon Cheo Fusi , Martin Botka , Martin Botka Subject: Re: [PATCH v2 8/8] arm64: dts: allwinner: h616: enable DVFS for all boards Message-ID: <20240318105153.2c666647@donnerap.manchester.arm.com> In-Reply-To: References: Organization: ARM X-Mailer: Claws Mail 3.18.0 (GTK+ 2.24.32; aarch64-unknown-linux-gnu) Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Mon, 18 Mar 2024 04:39:46 +0000 Amit Singh Tomar wrote: Hi Amit, can you please try to reply using the standard quoted line prefix ('>'), and cut the header? I almost missed your question in here. > Hi, > > -----Original Message----- > From: linux-arm-kernel On Behalf Of Andre Przywara > Sent: Monday, March 18, 2024 6:42 AM > To: Yangtao Li ; Viresh Kumar ; Nishanth Menon ; Stephen Boyd ; Rob Herring ; Krzysztof Kozlowski ; Conor Dooley ; Chen-Yu Tsai ; Jernej Skrabec ; Samuel Holland ; Rafael J . Wysocki > Cc: linux-pm@vger.kernel.org; devicetree@vger.kernel.org; linux-sunxi@lists.linux.dev; linux-arm-kernel@lists.infradead.org; Brandon Cheo Fusi ; Martin Botka ; Martin Botka > Subject: [EXTERNAL] [PATCH v2 8/8] arm64: dts: allwinner: h616: enable DVFS for all boards > > > With the DT bindings now describing the format of the CPU OPP tables, we can include the OPP table in each board's .dts file, and specify the CPU power supply. > This allows to enable DVFS, and get up to 50% of performance benefit in the highest OPP, or up to 60% power savings in the lowest OPP, compared to the fixed 1GHz @ 1.0V OPP we are running in by default > at the moment. > [Amit] Could you please elaborate, what test were run to see 50 % performance benefits? Currently all H616 boards running mainline firmware and kernels run at a fixed 1GHz CPU clock frequency. If you happen to have a good SoC (bin 1 or 3), this patchset will allow you to run at 1.5 GHz, which is 50% faster. So anything that scales with CPU frequency should run much quicker. Cheers, Andre > Signed-off-by: Andre Przywara > --- > .../boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi | 5 +++++ > arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts | 5 +++++ > arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts | 5 +++++ > .../arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts | 5 +++++ arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts | 5 +++++ > .../boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts | 5 +++++ > 6 files changed, 30 insertions(+) > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi > index 1fed2b46cfe87..86e58d1ed23ea 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-bigtreetech-cb1.dtsi > @@ -6,6 +6,7 @@ > /dts-v1/; > > #include "sun50i-h616.dtsi" > +#include "sun50i-h616-cpu-opp.dtsi" > > #include > #include > @@ -62,6 +63,10 @@ wifi_pwrseq: wifi-pwrseq { > }; > }; > > +&cpu0 { > + cpu-supply = <®_dcdc2>; > +}; > + > &mmc0 { > vmmc-supply = <®_dldo1>; > /* Card detection pin is not connected */ diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts > index b5d713926a341..a360d8567f955 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-orangepi-zero2.dts > @@ -6,12 +6,17 @@ > /dts-v1/; > > #include "sun50i-h616-orangepi-zero.dtsi" > +#include "sun50i-h616-cpu-opp.dtsi" > > / { > model = "OrangePi Zero2"; > compatible = "xunlong,orangepi-zero2", "allwinner,sun50i-h616"; }; > > +&cpu0 { > + cpu-supply = <®_dcdca>; > +}; > + > &emac0 { > allwinner,rx-delay-ps = <3100>; > allwinner,tx-delay-ps = <700>; > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts > index 959b6fd18483b..26d25b5b59e0f 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616-x96-mate.dts > @@ -6,6 +6,7 @@ > /dts-v1/; > > #include "sun50i-h616.dtsi" > +#include "sun50i-h616-cpu-opp.dtsi" > > #include > #include > @@ -32,6 +33,10 @@ reg_vcc5v: vcc5v { > }; > }; > > +&cpu0 { > + cpu-supply = <®_dcdca>; > +}; > + > &ehci0 { > status = "okay"; > }; > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts > index 21ca1977055d9..6a4f0da972330 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero2w.dts > @@ -6,6 +6,7 @@ > /dts-v1/; > > #include "sun50i-h616.dtsi" > +#include "sun50i-h616-cpu-opp.dtsi" > > #include > #include > @@ -53,6 +54,10 @@ reg_vcc3v3: vcc3v3 { > }; > }; > > +&cpu0 { > + cpu-supply = <®_dcdc2>; > +}; > + > &ehci1 { > status = "okay"; > }; > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts > index b3b1b8692125f..e1cd7572a14ce 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-orangepi-zero3.dts > @@ -6,12 +6,17 @@ > /dts-v1/; > > #include "sun50i-h616-orangepi-zero.dtsi" > +#include "sun50i-h616-cpu-opp.dtsi" > > / { > model = "OrangePi Zero3"; > compatible = "xunlong,orangepi-zero3", "allwinner,sun50i-h618"; }; > > +&cpu0 { > + cpu-supply = <®_dcdc2>; > +}; > + > &emac0 { > allwinner,tx-delay-ps = <700>; > phy-mode = "rgmii-rxid"; > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts > index 8ea1fd41aebaa..2dd178a164fbe 100644 > --- a/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-transpeed-8k618-t.dts > @@ -6,6 +6,7 @@ > /dts-v1/; > > #include "sun50i-h616.dtsi" > +#include "sun50i-h616-cpu-opp.dtsi" > > #include > #include > @@ -41,6 +42,10 @@ reg_vcc3v3: vcc3v3 { > }; > }; > > +&cpu0 { > + cpu-supply = <®_dcdc2>; > +}; > + > &ehci0 { > status = "okay"; > }; > -- > 2.35.8 > >