[RFC PATCH 0/9] pinctrl: sunxi: Allwinner A733 support

[Andre Przywara <andre.przywara@arm.com>]

This series adds support for the pinctrl and GPIO IP in the new
Allwinner A733 SoC.
With all our abstractions and data structure driven code, life could
have been so easy, but Allwinner decided to change the layout of the
MMIO register frame, which requires all kinds of special handling and
code changes here and there. Hopefully this new layout (which admittedly
looks more future proof) will stay around for a while, but I am not
holding my breath on this.

In summary, the changes are:
- Each GPIO bank now occupies 128 bytes instead of just 36 or 48.
- PortA (not implemented on the A733) starts at offset 0x80, not at 0.
- The non-bank specific registers are moved into this gap at the
  beginning.
- There are two new registers per bank, to set or clear bits in the GPIO
  data register, to allow for single-write, lockless GPIO settings.
- The drive level register is moved (to make room for the set/clr regs).
- The IRQ registers are moved into the now bigger respective bank control
  registers part, instead of being grouped separately, as before.

The series follows the usual pattern of refactoring first, to prepare
for the new MMIO frame layout (patches 1-4), then using the changed code
to enable support for this new generation, in patch 5/9.
Patch 6/9 adds support for the one new feature of this SoC's pinctrl IP,
the lockless GPIO settings feature.
Patch 7/9 adds the new DT bindings, patch 8/9 enables the secondary
controller, which curiously is not using the new layout, but looks very
similar to the secondary A523 pin controller.
The final patch 9/9 then adds the driver stub file, which just describes
the GPIO bank configuration and lists the two quirk bits that engage the
code changes added for the new layout.

Based on v6.17-rc1.

I am marking this as RFC, as I don't have suitable hardware for testing.
Also I am not 100% convinced the IRQ number to pin mapping, as needed by
the new IRQ register location, works correctly.
Please have a look, check whether the changes look sane, and test it if
you have access to hardware.

A branch (together with the AXP318W PMIC code) is available at:
https://github.com/apritzel/linux/commits/a733-rfc

Cheers,
Andre

Andre Przywara (9):
  pinctrl: sunxi: rename SUNXI_PINCTRL_NEW_REG_LAYOUT
  pinctrl: sunxi: pass down flags to pinctrl routines
  pinctrl: sunxi: only use PortK special handling on A523
  pinctrl: sunxi: refactor IRQ register accessors
  pinctrl: sunxi: support A733 generation MMIO register layout
  pinctrl: sunxi: add support for set/clear regs
  dt-bindings: pinctrl: add compatible for Allwinner A733
  pinctrl: sunxi: a523-r: add a733-r compatible string
  pinctrl: sunxi: Add support for the Allwinner A733

 .../allwinner,sun55i-a523-pinctrl.yaml        |  6 +-
 drivers/pinctrl/sunxi/Kconfig                 |  5 ++
 drivers/pinctrl/sunxi/Makefile                |  1 +
 drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c     |  2 +-
 drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c |  3 +-
 drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c   |  2 +-
 drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c   | 51 +++++++++++
 drivers/pinctrl/sunxi/pinctrl-sunxi.c         | 85 +++++++++++--------
 drivers/pinctrl/sunxi/pinctrl-sunxi.h         | 76 +++++++++++------
 9 files changed, 169 insertions(+), 62 deletions(-)
 create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun60i-a733.c

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2.46.3