Re: [RFC PATCH] pinctrl: sunxi: convert to GPIO_GENERIC

Jernej Škrabec
2026-03-14T09:12:01Z

Dne sobota, 14. marec 2026 ob 09:38:11 Srednjeevropski standardni čas je Chen-Yu Tsai napisal(a):
> On Sat, Mar 14, 2026 at 1:14 PM Icenowy Zheng <uwu@icenowy.me> wrote:
> >
> > 在 2026-03-13五的 01:06 +0100，Andre Przywara写道：
> > > Allwinner SoCs combine pinmuxing and GPIO control in one device/MMIO
> > > register frame. So far we were instantiating one GPIO chip per
> > > pinctrl
> > > device, which covers multiple banks of up to 32 GPIO pins per bank.
> > > The
> > > GPIO numbers were set to match the absolute pin numbers, even across
> > > the
> > > typically two instances of the pinctrl device.
> > >
> > > Convert the GPIO part of the sunxi pinctrl over to use the
> > > gpio_generic
> > > framework. This alone allows to remove some sunxi specific code,
> > > which
> > > is replaced with the existing generic code. This will become even
> > > more
> > > useful with the upcoming A733 support, which adds set and clear
> > > registers for the output.
> > > As a side effect this also changes the GPIO device and number
> > > allocation: Each bank is now represented by its own gpio_chip, with
> > > only
> > > as many pins as there are actually implemented. The numbering is left
> > > up
> >
> > Ah, is this a userspace API break?
>
> Unfortunately, yes. This means the easily computable numbers that one can
> use with the (deprecated) sysfs interface is gone, and also the pins are
> now split amongst multiple gpiochip instances.

I don't mind this at all for new SoCs, e.g. A733, but not really for already
supported SoCs.

>
> However if someone wanted the old "one gpiochip for one PIO instance with
> evenly spaced banks" scheme, I suppose we could put together something
> with the GPIO aggregator driver? It won't have same base pin number though.

IIUC, this can be instantiated only via sysfs or configfs?

Best regards,
Jernej