[RFC] Allwinner T536 initial support & pinctrl register layout redesign

[qianfanguijin <qianfanguijin@163.com>]

Hi everyone,

I'm reaching out to see if there's any interest in supporting the Allwinner T536, an industrial-grade SoC featuring a quad-core Cortex-A55. I'm currently working on an upstream Linux kernel port for this chip.

Progress so far:

    Basic CCU support
    pinctrl (GPIO and IRQ)
    UART console
    Successfully boots a minimal initramfs

The T536 introduces a redesigned GPIO register layout that is incompatible with the register mapping used by currently supported Allwinner SoCs. To accommodate this, I've refactored relevant register-related information into the pinctrl ops structure.

Andre, I heavily referenced your recent work on the A523 during development. Could you confirm whether GPIO interrupts are currently functional on A523? In my testing on the T536, I noticed that when irq_read_needs_mux is configured, the IRQ multiplexing mode is incorrectly set to 6, which breaks interrupt handling. I don't have access to A523 hardware for verification, but it appears this logic may need adjustment. Any insights or testing feedback would be greatly appreciated.

Due to the GPIO subsystem redesign, I've made several modifications to the sunxi-pinctrl driver. A work-in-progress tree is available for review here: https://github.com/qianfan-Zhao/linux/tree/t536

I would appreciate your review and guidance on the upstreaming strategy:

    Should the pinctrl/register layout changes be submitted and merged first as a foundation?
    Or is it preferred to hold off until broader T536 support is complete?

Any feedback on the code structure, IRQ handling, or submission workflow would be extremely helpful. I'll format and send proper patches via git send-email once the direction is confirmed.

Thanks in advance for your time and guidance.