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[9.244.8.156]) by smtp.gmail.com with ESMTPSA id 956f58d0204a3-665000c8152sm1920856d50.0.2026.06.30.22.48.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 30 Jun 2026 22:48:48 -0700 (PDT) From: Enzo Adriano To: Jerome Brunet Cc: Junhui Liu , Alexandre Belloni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Michael Turquette , Stephen Boyd , Maxime Ripard , linux-rtc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org Subject: Re: [PATCH v2 0/6] clk: sun6i-rtc: Add support for Allwinner A733 SoC Date: Wed, 1 Jul 2026 01:47:44 -0400 Message-ID: <20260701054744.3962458-1-enzo.adriano.code@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260629-a733-rtc-v2-0-7b72112784f8@baylibre.com> References: <20260629-a733-rtc-v2-0-7b72112784f8@baylibre.com> Precedence: bulk X-Mailing-List: linux-sunxi@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Hi Jerome, Thanks for reworking the A733 RTC support. I ran v2 on a Radxa Cubie A7S. This is local validation evidence only, not a hardware Tested-by. For the A7S integration test, I stacked the series with the currently visible public A733 CCU/PRCM v1 and pinctrl v1 prerequisites. Focused RTC binding validation, targeted RTC/clk builds, and a Cubie A7S DTB build all pass, and focused CHECK_DTBS=y shows no RTC, main CCU, or R-CCU findings. The remaining findings in that base are unrelated A733-wide schema gaps. On A7S hardware the artifact boots cleanly to shell and the RTC driver probes and registers as rtc0. While the board stays powered, RTC read, write, and a short readback all work correctly; the readback advances as expected. I am deliberately not adding a Tested-by. The RTC value does not survive a full power removal on this board: the published Cubie A7S V1.10 schematic exposes the PMIC BKUPBAT pin but does not show a connected backup battery or supercap path, and Radxa's A7S documentation describes no populated RTC backup battery interface. So I can confirm the driver is runtime-functional while powered, but I cannot honestly attest cold-power persistence on this board. Happy to rerun only the persistence phase if a valid VRTC/BKUPBAT backup supply is identified or fitted.